Commit 77ea071f authored by Simon Guinot's avatar Simon Guinot Committed by Albert ARIBAUD
Browse files

ARM: remove duplicated code for LaCie boards



This patch groups together all the common functions for LaCie boards:
Ethernet PHY and MAC address initializations.

Moreover the configurations for LaCie Kirkwood boards are merged into
a single file: include/configs/lacie_kw.h
Signed-off-by: default avatarSimon Guinot <simon.guinot@sequanux.org>
parent 5628fb75
/*
* Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*/
#include <common.h>
#include <i2c.h>
#include <miiphy.h>
#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
#define MV88E1116_LED_FCTRL_REG 10
#define MV88E1116_CPRSP_CR3_REG 21
#define MV88E1116_MAC_CTRL_REG 21
#define MV88E1116_PGADR_REG 22
#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
void mv_phy_88e1116_init(const char *name)
{
u16 reg;
u16 devadr;
if (miiphy_set_current_dev(name))
return;
/* command to read PHY dev address */
if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
printf("Err..(%s) could not read PHY dev address\n", __func__);
return;
}
/*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
/* reset the phy */
miiphy_reset(name, devadr);
printf("88E1116 Initialized on %s\n", name);
}
#endif /* CONFIG_CMD_NET && CONFIG_RESET_PHY_R */
#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
int lacie_read_mac_address(uchar *mac_addr)
{
int ret;
ushort version;
/* I2C-0 for on-board EEPROM */
i2c_set_bus_num(0);
/* Check layout version for EEPROM data */
ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
(uchar *) &version, 2);
if (ret != 0) {
printf("Error: failed to read I2C EEPROM @%02x\n",
CONFIG_SYS_I2C_EEPROM_ADDR);
return ret;
}
version = be16_to_cpu(version);
if (version < 1 || version > 3) {
printf("Error: unknown version %d for EEPROM data\n",
version);
return -1;
}
/* Read Ethernet MAC address from EEPROM */
ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 2,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN, mac_addr, 6);
if (ret != 0)
printf("Error: failed to read I2C EEPROM @%02x\n",
CONFIG_SYS_I2C_EEPROM_ADDR);
return ret;
}
#endif /* CONFIG_CMD_I2C && CONFIG_SYS_I2C_EEPROM_ADDR */
/*
* Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*/
#ifndef _LACIE_COMMON_H
#define _LACIE_COMMON_H
#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
void mv_phy_88e1116_init(const char *name);
#endif
#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
int lacie_read_mac_address(uchar *mac);
#endif
#endif /* _LACIE_COMMON_H */
......@@ -26,10 +26,13 @@
#
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
LIB = $(obj)lib$(BOARD).o
COBJS := edminiv2.o
COBJS := edminiv2.o ../common/common.o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
......
......@@ -27,7 +27,6 @@
#include <common.h>
#include <miiphy.h>
#include <asm/arch/orion5x.h>
#include "edminiv2.h"
DECLARE_GLOBAL_DATA_PTR;
......@@ -96,33 +95,6 @@ int board_init(void)
/* Configure and enable MV88E1116 PHY */
void reset_phy(void)
{
u16 reg;
u16 devadr;
char *name = "egiga0";
if (miiphy_set_current_dev(name))
return;
/* command to read PHY dev address */
if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
printf("Err..%s could not read PHY dev address\n",
__func__);
return;
}
/*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
/* reset the phy */
miiphy_reset(name, devadr);
printf("88E1116 Initialized on %s\n", name);
mv_phy_88e1116_init("egiga0");
}
#endif /* CONFIG_RESET_PHY_R */
/*
* (C) Copyright 2009
* Net Insight <www.netinsight.net>
* Written-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
*
* Based on sheevaplug.h:
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#ifndef __EDMINIV2_BASE_H
#define __EDMINIV2_BASE_H
/* PHY related */
#define MV88E1116_LED_FCTRL_REG 10
#define MV88E1116_CPRSP_CR3_REG 21
#define MV88E1116_MAC_CTRL_REG 21
#define MV88E1116_PGADR_REG 22
#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
#endif /* __EDMINIV2_BASE_H */
......@@ -21,10 +21,13 @@
#
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
LIB = $(obj)lib$(BOARD).o
COBJS := net2big_v2.o
COBJS := $(BOARD).o ../common/common.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
......
......@@ -21,15 +21,14 @@
*/
#include <common.h>
#include <miiphy.h>
#include <netdev.h>
#include <command.h>
#include <i2c.h>
#include <asm/arch/cpu.h>
#include <asm/arch/kirkwood.h>
#include <asm/arch/mpp.h>
#include <asm/arch/gpio.h>
#include "net2big_v2.h"
#include "../common/common.h"
DECLARE_GLOBAL_DATA_PTR;
......@@ -92,91 +91,29 @@ int board_init(void)
return 0;
}
#if defined(CONFIG_MISC_INIT_R)
int misc_init_r(void)
{
#ifdef CONFIG_CMD_I2C
#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
if (!getenv("ethaddr")) {
ushort version;
uchar mac[6];
int ret;
/* I2C-0 for on-board EEPROM */
i2c_set_bus_num(0);
/* Check layout version for EEPROM data */
ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
(uchar *) &version, 2);
if (ret != 0) {
printf("Error: failed to read I2C EEPROM @%02x\n",
CONFIG_SYS_I2C_EEPROM_ADDR);
return ret;
}
version = be16_to_cpu(version);
if (version < 1 || version > 3) {
printf("Error: unknown version %d for EEPROM data\n",
version);
return -1;
}
/* Read Ethernet MAC address from EEPROM */
ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 2,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN, mac, 6);
if (ret != 0) {
printf("Error: failed to read I2C EEPROM @%02x\n",
CONFIG_SYS_I2C_EEPROM_ADDR);
return ret;
}
eth_setenv_enetaddr("ethaddr", mac);
if (lacie_read_mac_address(mac) == 0)
eth_setenv_enetaddr("ethaddr", mac);
}
#endif /* CONFIG_CMD_I2C */
#endif
return 0;
}
#endif
void mv_phy_88e1116_init(char *name)
{
u16 reg;
u16 devadr;
if (miiphy_set_current_dev(name))
return;
/* command to read PHY dev address */
if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
printf("Err..(%s) could not read PHY dev address\n", __func__);
return;
}
/*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
/* reset the phy */
if (miiphy_read(name, devadr, MII_BMCR, &reg) != 0) {
printf("Err..(%s) PHY status read failed\n", __func__);
return;
}
if (miiphy_write(name, devadr, MII_BMCR, reg | 0x8000) != 0) {
printf("Err..(%s) PHY reset failed\n", __func__);
return;
}
debug("88E1116 Initialized on %s\n", name);
}
#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
/* Configure and initialize PHY */
void reset_phy(void)
{
mv_phy_88e1116_init("egiga0");
}
#endif
#if defined(CONFIG_KIRKWOOD_GPIO)
/* Return GPIO push button status */
static int
do_read_push_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
......@@ -186,3 +123,4 @@ do_read_push_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
U_BOOT_CMD(button, 1, 1, do_read_push_button,
"Return GPIO push button status 0=off 1=on", "");
#endif
......@@ -32,12 +32,4 @@
/* Buttons */
#define NET2BIG_V2_GPIO_PUSH_BUTTON 34
/* PHY related */
#define MV88E1116_LED_FCTRL_REG 10
#define MV88E1116_CPRSP_CR3_REG 21
#define MV88E1116_MAC_CTRL_REG 21
#define MV88E1116_PGADR_REG 22
#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
#endif /* NET2BIG_V2_H */
......@@ -21,10 +21,13 @@
#
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
LIB = $(obj)lib$(BOARD).o
COBJS := netspace_v2.o
COBJS := $(BOARD).o ../common/common.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
......
......@@ -21,15 +21,14 @@
*/
#include <common.h>
#include <miiphy.h>
#include <netdev.h>
#include <command.h>
#include <i2c.h>
#include <asm/arch/cpu.h>
#include <asm/arch/kirkwood.h>
#include <asm/arch/mpp.h>
#include <asm/arch/gpio.h>
#include "netspace_v2.h"
#include "../common/common.h"
DECLARE_GLOBAL_DATA_PTR;
......@@ -90,91 +89,29 @@ int board_init(void)
return 0;
}
#if defined(CONFIG_MISC_INIT_R)
int misc_init_r(void)
{
#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
if (!getenv("ethaddr")) {
ushort version;
uchar mac[6];
int ret;
/* I2C-0 for on-board EEPROM */
i2c_set_bus_num(0);
/* Check layout version for EEPROM data */
ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
(uchar *) &version, 2);
if (ret != 0) {
printf("Error: failed to read I2C EEPROM @%02x\n",
CONFIG_SYS_I2C_EEPROM_ADDR);
return ret;
}
version = be16_to_cpu(version);
if (version < 1 || version > 3) {
printf("Error: unknown version %d for EEPROM data\n",
version);
return -1;
}
/* Read Ethernet MAC address from EEPROM */
ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 2,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN, mac, 6);
if (ret != 0) {
printf("Error: failed to read I2C EEPROM @%02x\n",
CONFIG_SYS_I2C_EEPROM_ADDR);
return ret;
}
eth_setenv_enetaddr("ethaddr", mac);
if (lacie_read_mac_address(mac) == 0)
eth_setenv_enetaddr("ethaddr", mac);
}
#endif /* CONFIG_CMD_I2C && CONFIG_SYS_I2C_EEPROM_ADDR */
#endif
return 0;
}
#endif
void mv_phy_88e1116_init(char *name)
{
u16 reg;
u16 devadr;
if (miiphy_set_current_dev(name))
return;
/* command to read PHY dev address */
if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
printf("Err..(%s) could not read PHY dev address\n", __func__);
return;
}
/*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
/* reset the phy */
if (miiphy_read(name, devadr, MII_BMCR, &reg) != 0) {
printf("Err..(%s) PHY status read failed\n", __func__);
return;
}
if (miiphy_write(name, devadr, MII_BMCR, reg | 0x8000) != 0) {
printf("Err..(%s) PHY reset failed\n", __func__);
return;
}
debug("88E1116 Initialized on %s\n", name);
}
#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
/* Configure and initialize PHY */
void reset_phy(void)
{
mv_phy_88e1116_init("egiga0");
}
#endif
#if defined(CONFIG_KIRKWOOD_GPIO)
/* Return GPIO button status */
static int
do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
......@@ -184,3 +121,4 @@ do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
U_BOOT_CMD(button, 1, 1, do_read_button,
"Return GPIO button status 0=off 1=on", "");
#endif
......@@ -31,12 +31,4 @@
#define NETSPACE_V2_GPIO_BUTTON 32
/* PHY related */
#define MV88E1116_LED_FCTRL_REG 10
#define MV88E1116_CPRSP_CR3_REG 21
#define MV88E1116_MAC_CTRL_REG 21
#define MV88E1116_PGADR_REG 22
#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
#endif /* NETSPACE_V2_H */
......@@ -140,10 +140,10 @@ km_kirkwood arm arm926ejs km_arm keymile
km_kirkwood_pci arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_RECONFIG_XLX
mgcoge3un arm arm926ejs km_arm keymile kirkwood
portl2 arm arm926ejs km_arm keymile kirkwood
inetspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:INETSPACE_V2
net2big_v2 arm arm926ejs net2big_v2 LaCie kirkwood
netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_V2
netspace_max_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_MAX_V2
inetspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:INETSPACE_V2
net2big_v2 arm arm926ejs net2big_v2 LaCie kirkwood lacie_kw:NET2BIG_V2
netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:NETSPACE_V2
netspace_max_v2 arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:NETSPACE_MAX_V2
dreamplug arm arm926ejs - Marvell kirkwood
guruplug arm arm926ejs - Marvell kirkwood
mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood
......
......@@ -15,8 +15,8 @@
* GNU General Public License for more details.
*/
#ifndef _CONFIG_NETSPACE_V2_H
#define _CONFIG_NETSPACE_V2_H
#ifndef _CONFIG_LACIE_KW_H
#define _CONFIG_LACIE_KW_H
/*
* Machine number definition
......@@ -30,6 +30,9 @@
#elif defined(CONFIG_NETSPACE_MAX_V2)
#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_MAX_V2
#define CONFIG_IDENT_STRING " NS Max v2"
#elif defined(CONFIG_NET2BIG_V2)
#define CONFIG_MACH_TYPE MACH_TYPE_NET2BIG_V2
#define CONFIG_IDENT_STRING " 2Big v2"
#else
#error "Unknown board"
#endif
......@@ -56,11 +59,19 @@
#define CONFIG_CMD_USB
/*
* Core clock definition.
* Core clock definition
*/
#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
/*
* SDRAM configuration
*/
#if defined(CONFIG_NET2BIG_V2)
#define CONFIG_NR_DRAM_BANKS 2
#else
#define CONFIG_NR_DRAM_BANKS 1
#endif
#ifdef CONFIG_INETSPACE_V2
/* Different SDRAM configuration and size for Internet Space v2 */
#define CONFIG_SYS_KWD_CONFIG ($(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-is2.cfg)
......@@ -81,7 +92,11 @@
#define CONFIG_ENV_SPI_MAX_HZ 20000000 /* 20Mhz */
#define CONFIG_SYS_IDE_MAXBUS 1
#define CONFIG_SYS_IDE_MAXDEVICE 1
#if defined(CONFIG_NET2BIG_V2)
#define CONFIG_SYS_PROMPT "2big2> "
#else
#define CONFIG_SYS_PROMPT "ns2> "
#endif
/*
* Ethernet Driver configuration
......@@ -97,11 +112,10 @@
*/
#ifdef CONFIG_MVSATA_IDE
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
/* Network Space Max v2 use 2 SATA ports */
#ifdef CONFIG_NETSPACE_MAX_V2
#if defined(CONFIG_NETSPACE_MAX_V2) || defined(CONFIG_NET2BIG_V2)
#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET
#endif
#endif
#endif /* CONFIG_MVSATA_IDE */
/*
* Enable GPI0 support
......@@ -176,4 +190,4 @@
"usbload=usb start && " \
"fatload usb 0:1 $loadaddr /boot/$bootfile\0"
#endif /* _CONFIG_NETSPACE_V2_H */
#endif /* _CONFIG_LACIE_KW_H */
/*
* Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _CONFIG_NET2BIG_V2_H
#define _CONFIG_NET2BIG_V2_H
/*
* Machine number information
*/
#define CONFIG_IDENT_STRING " 2Big v2"