Commit 7c1058fa authored by Simon Glass's avatar Simon Glass
Browse files

rockchip: Add support for Raxda Rock 2



This board includes an RK3288 SoC on a SOM. It can be mounted on a
base-board which provides a wide range of peripherals.

So far this is verified to boot to a prompt from a microSD card. The serial
console works as well as HDMI.

Thanks to Tom Cubie for sending me a board.
Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
parent cf629bb2
...@@ -22,6 +22,7 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ ...@@ -22,6 +22,7 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
dtb-$(CONFIG_ARCH_ROCKCHIP) += \ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-firefly.dtb \ rk3288-firefly.dtb \
rk3288-jerry.dtb \ rk3288-jerry.dtb \
rk3288-rock2-square.dtb \
rk3036-sdk.dtb rk3036-sdk.dtb
dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \ tegra20-medcom-wide.dtb \
......
...@@ -114,6 +114,7 @@ static void configure_l2ctlr(void) ...@@ -114,6 +114,7 @@ static void configure_l2ctlr(void)
#ifdef CONFIG_SPL_MMC_SUPPORT #ifdef CONFIG_SPL_MMC_SUPPORT
static int configure_emmc(struct udevice *pinctrl) static int configure_emmc(struct udevice *pinctrl)
{ {
#ifndef CONFIG_TARGET_ROCK2
struct gpio_desc desc; struct gpio_desc desc;
int ret; int ret;
...@@ -143,6 +144,7 @@ static int configure_emmc(struct udevice *pinctrl) ...@@ -143,6 +144,7 @@ static int configure_emmc(struct udevice *pinctrl)
debug("gpio value ret=%d\n", ret); debug("gpio value ret=%d\n", ret);
return ret; return ret;
} }
#endif
return 0; return 0;
} }
......
...@@ -16,6 +16,14 @@ config TARGET_CHROMEBOOK_JERRY ...@@ -16,6 +16,14 @@ config TARGET_CHROMEBOOK_JERRY
WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to
the keyboard and battery functions. the keyboard and battery functions.
config TARGET_ROCK2
bool "Radxa Rock 2"
help
Rock 2 is a SOM and base-board combination based on RK3288. It
includes Ethernet, HDMI, 3 USB, micro-SD, audio, SATA, WiFi and
space for a real-time-clock battery. There is also an expansion
interface which provides access to many pins.
config ROCKCHIP_FAST_SPL config ROCKCHIP_FAST_SPL
bool "Change the CPU to full speed in SPL" bool "Change the CPU to full speed in SPL"
depends on TARGET_CHROMEBOOK_JERRY depends on TARGET_CHROMEBOOK_JERRY
...@@ -35,4 +43,6 @@ source "board/google/chromebook_jerry/Kconfig" ...@@ -35,4 +43,6 @@ source "board/google/chromebook_jerry/Kconfig"
source "board/firefly/firefly-rk3288/Kconfig" source "board/firefly/firefly-rk3288/Kconfig"
source "board/radxa/rock2/Kconfig"
endif endif
if TARGET_ROCK2
config SYS_BOARD
default "rock2"
config SYS_VENDOR
default "radxa"
config SYS_CONFIG_NAME
default "rock2"
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
endif
FIREFLY
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: board/radxa/rock2
F: include/configs/rock2.h
F: configs/rock2_defconfig
#
# (C) Copyright 2015 Google, Inc
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += rock2.o
/*
* (C) Copyright 2015 Google, Inc
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_TARGET_ROCK2=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square"
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent"
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_RESET=y
CONFIG_DM_MMC=y
CONFIG_ROCKCHIP_DWMMC=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_PINCTRL=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_ACT8846=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_ACT8846=y
CONFIG_DM_PWM=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_DM_VIDEO=y
CONFIG_VIDEO_ROTATION=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
...@@ -39,7 +39,7 @@ Building ...@@ -39,7 +39,7 @@ Building
At present three RK3288 boards are supported: At present three RK3288 boards are supported:
- Firefly RK3288 - use firefly-rk3288 configuration - Firefly RK3288 - use firefly-rk3288 configuration
- Radxa Rock 2 - also uses firefly-rk3288 configuration - Radxa Rock 2 - use rock2 configuration
- Haier Chromebook - use chromebook_jerry configuration - Haier Chromebook - use chromebook_jerry configuration
one RK3036 board is support: one RK3036 board is support:
...@@ -52,11 +52,6 @@ For example: ...@@ -52,11 +52,6 @@ For example:
(or you can use another cross compiler if you prefer) (or you can use another cross compiler if you prefer)
Note that the Radxa Rock 2 uses the Firefly configuration for now as
device tree files are not yet available for the Rock 2. Clearly the two
have hardware differences, so this approach will break down as more drivers
are added.
Writing to the board with USB Writing to the board with USB
============================= =============================
......
/*
* (C) Copyright 2015 Google, Inc
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#define ROCKCHIP_DEVICE_SETTINGS \
"stdin=serial,cros-ec-keyb\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#include <configs/rk3288_common.h>
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
/* SPL @ 32k for ~36k
* ENV @ 96k
* u-boot @ 128K
*/
#define CONFIG_ENV_OFFSET (96 * 1024)
#define CONFIG_I2C_EDID
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_CONSOLE_SCROLL_LINES 10
#endif
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