Commit 7e780369 authored by wdenk's avatar wdenk
Browse files

* Patch by Mark Jonas: Remove config.tmp files only when

  unconfiguring the board

* Adapt RMU board for bigger flash memory

* Test fix for ethernet problems on MPC5200
parent 0608e04d
......@@ -2,6 +2,11 @@
Changes for U-Boot 1.0.2:
======================================================================
* Patch by Mark Jonas: Remove config.tmp files only when
unconfiguring the board
* Adapt RMU board for bigger flash memory
* Patch by Klaus Heydeck, 13 Mar 2003:
Add support for KUP4X Board
......
......@@ -187,7 +187,7 @@ endif
#########################################################################
unconfig:
rm -f include/config.h include/config.mk
rm -f include/config.h include/config.mk board/*/config.tmp
#========================================================================
# PowerPC
......@@ -1231,7 +1231,7 @@ clean:
rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
rm -f tools/env/fw_printenv tools/env/fw_setenv
rm -f board/cray/L1/bootscript.c board/cray/L1/bootscript.image
rm -f board/trab/trab_fkt board/*/config.tmp
rm -f board/trab/trab_fkt
clobber: clean
find . -type f \
......
/*
* (C) Copyright 2000
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
......@@ -21,6 +21,8 @@
* MA 02111-1307 USA
*/
/* #define DEBUG */
#include <common.h>
#include <mpc8xx.h>
......@@ -49,28 +51,35 @@ unsigned long flash_init (void)
}
/* Static FLASH Bank configuration here - FIXME XXX */
debug ("\n## Get flash bank size @ 0x%08x\n", FLASH_BASE_PRELIM);
size_b0 = flash_get_size((vu_long *)FLASH_BASE_PRELIM, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b0, size_b0<<20);
}
debug ("## Before remap: BR0: 0x%08x OR0: 0x%08x\n",
memctl->memc_br0, memctl->memc_or0);
/* Remap FLASH according to real size */
memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
debug ("## BR0: 0x%08x OR0: 0x%08x\n",
memctl->memc_br0, memctl->memc_or0);
/* Re-do sizing to get full correct info */
size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
/* monitor protection ON by default */
flash_protect(FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE+monitor_flash_len-1,
&flash_info[0]);
#endif
#ifdef CFG_ENV_IS_IN_FLASH
/* ENV protection ON by default */
......@@ -80,8 +89,21 @@ unsigned long flash_init (void)
&flash_info[0]);
#endif
#if defined(CFG_ENV_ADDR_REDUND) || defined(CFG_ENV_OFFSET_REDUND)
debug ("Protect redundand environment: %08lx ... %08lx\n",
(ulong)CFG_ENV_ADDR_REDUND,
(ulong)CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE - 1);
flash_protect(FLAG_PROTECT_SET,
CFG_ENV_ADDR_REDUND,
CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
&flash_info[0]);
#endif
flash_info[0].size = size_b0;
debug ("## Final Flash bank size: %08lx\n", size_b0);
return (size_b0);
}
......@@ -192,6 +214,8 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
value = addr[0] ;
debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
switch (value & 0x00FF00FF) {
case AMD_MANUFACT:
info->flash_id = FLASH_MAN_AMD;
......@@ -208,6 +232,8 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
value = addr[2] ; /* device ID */
debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
switch (value & 0x00FF00FF) {
case (AMD_ID_LV400T & 0x00FF00FF):
info->flash_id += FLASH_AM400T;
......@@ -244,25 +270,22 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
info->sector_count = 35;
info->size = 0x00800000;
break; /* => 8 MB */
#if 0 /* enable when device IDs are available */
case AMD_ID_LV320T:
case (AMD_ID_LV320T & 0x00FF00FF):
info->flash_id += FLASH_AM320T;
info->sector_count = 67;
info->size = 0x00800000;
break; /* => 8 MB */
case AMD_ID_LV320B:
case (AMD_ID_LV320B & 0x00FF00FF):
info->flash_id += FLASH_AM320B;
info->sector_count = 67;
info->size = 0x01000000;
break; /* => 16 MB */
#endif
default:
info->flash_id = FLASH_UNKNOWN;
return (0); /* => no or unknown flash */
}
/*%%% sector start address modified */
/* set up sector start address table */
if (info->flash_id & FLASH_BTYPE) {
/* set sector offsets for bottom boot block type */
......@@ -314,6 +337,8 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
int flag, prot, sect, l_sect;
ulong start, now, last;
debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
if ((s_first < 0) || (s_first > s_last)) {
if (info->flash_id == FLASH_UNKNOWN) {
printf ("- missing\n");
......
......@@ -21,6 +21,8 @@
* MA 02111-1307 USA
*/
/* #define DEBUG */
#include <common.h>
#include <flash.h>
......@@ -45,6 +47,11 @@ flash_protect (int flag, ulong from, ulong to, flash_info_t *info)
short s_end = info->sector_count - 1; /* index of last sector */
int i;
debug ("flash_protect %s: from 0x%08lX to 0x%08lX\n",
(flag & FLAG_PROTECT_SET) ? "ON" :
(flag & FLAG_PROTECT_CLEAR) ? "OFF" : "???",
from, to);
/* Do nothing if input data is bad. */
if (info->sector_count == 0 || info->size == 0 || to < from) {
return;
......@@ -73,6 +80,7 @@ flash_protect (int flag, ulong from, ulong to, flash_info_t *info)
#else
info->protect[i] = 0;
#endif /* CFG_FLASH_PROTECTION */
debug ("protect off %d\n", i);
}
else if (flag & FLAG_PROTECT_SET) {
#if defined(CFG_FLASH_PROTECTION)
......@@ -80,6 +88,7 @@ flash_protect (int flag, ulong from, ulong to, flash_info_t *info)
#else
info->protect[i] = 1;
#endif /* CFG_FLASH_PROTECTION */
debug ("protect on %d\n", i);
}
}
}
......
......@@ -286,16 +286,8 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
fec->eth->r_cntrl = 0x05ee0024; /*0x05ee0004;FIXME */
}
if (fec->xcv_type == SEVENWIRE) {
/*
* Set FEC-Lite transmit control register(X_CNTRL):
*/
/*fec->eth->x_cntrl = 0x00000002; */ /* half-duplex, heartbeat */
fec->eth->x_cntrl = 0x00000000; /* half-duplex, heartbeat disabled */
} else {
/*fec->eth->x_cntrl = 0x00000006; */ /* full-duplex, heartbeat */
fec->eth->x_cntrl = 0x00000004; /* full-duplex, heartbeat disabled */
fec->eth->x_cntrl = 0x00000000; /* half-duplex, heartbeat disabled */
if (fec->xcv_type != SEVENWIRE) {
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
......@@ -485,7 +477,7 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
#endif
return -1;
}
} while ((phyStatus & 0x0020) != 0x0020);
} while (!(phyStatus & 0x0004));
#if (DEBUG & 0x2)
printf("PHY auto neg complete! \n");
......
......@@ -155,6 +155,7 @@ void cpu_init_f (volatile immap_t * immr)
defined(CONFIG_MHPC) || \
defined(CONFIG_PCU_E) || \
defined(CONFIG_R360MPI) || \
defined(CONFIG_RMU) || \
defined(CONFIG_RPXCLASSIC) || \
defined(CONFIG_RPXLITE) || \
defined(CONFIG_SPD823TS)
......
......@@ -27,12 +27,12 @@
*
* The processor starts at 0x00000100 and the code is executed
* from flash. The code is organized to be at an other address
* in memory, but as long we don't jump around before relocating.
* in memory, but as long we don't jump around before relocating,
* board_init lies at a quite high address and when the cpu has
* jumped there, everything is ok.
* This works because the cpu gives the FLASH (CS0) the whole
* address space at startup, and board_init lies as a echo of
* the flash somewhere up there in the memorymap.
* the flash somewhere up there in the memory map.
*
* board_init will change CS0 to be positioned at the correct
* address and (s)dram will be positioned at address 0
......
......@@ -232,7 +232,10 @@
* Ethernet configuration
*/
#define CONFIG_MPC5xxx_FEC 1
#define CONFIG_FEC_10MBIT 1 /* Workaround for FEC 100Mbit problem */
/*
* Define CONFIG_FEC_10MBIT to force FEC at 10Mb
*/
/* #define CONFIG_FEC_10MBIT 1 */
#define CONFIG_PHY_ADDR 0x00
/*
......@@ -278,10 +281,10 @@
#ifdef CONFIG_MPC5200_DDR
#define CFG_BOOTCS_START 0xFF800000
#define CFG_BOOTCS_START (CFG_CS1_START + CFG_CS1_SIZE)
#define CFG_BOOTCS_SIZE 0x00800000
#define CFG_BOOTCS_CFG 0x00047801
#define CFG_CS1_START 0xFF000000
#define CFG_CS1_START CFG_FLASH_BASE
#define CFG_CS1_SIZE 0x00800000
#define CFG_CS1_CFG 0x00047800
......
......@@ -181,8 +181,9 @@
*/
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_ADDR 0xFFF30000 /* Offset of Environment Sector */
#define CFG_ENV_ADDR 0xFFF30000 /* Offset of Environment Sector */
#define CFG_ENV_SIZE 0x00010000 /* Total Size of Environment Sector */
#define CFG_ENV_IS_EMBEDDED 1 /* short-cut compile-time test */
#define CONFIG_ENV_OVERWRITE 1 /* Allow modifying the environment */
/*
......
......@@ -222,6 +222,7 @@
#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment */
#define CFG_ENV_ADDR 0xFFFFE000 /* Address of Environment Sector */
#define CFG_ENV_SECT_SIZE 0x2000 /* use the top-most 8k boot sector */
#define CFG_ENV_IS_EMBEDDED 1 /* short-cut compile-time test */
#else
/* Final version: environment in EEPROM */
#define CFG_ENV_IS_IN_EEPROM 1
......
......@@ -49,8 +49,6 @@
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#endif
#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
#undef CONFIG_BOOTARGS
#define CONFIG_BOOTCOMMAND \
"bootp; " \
......@@ -151,15 +149,13 @@
* Please note that CFG_SDRAM_BASE _must_ start at 0
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE 0xFF800000
/*%%% #define CFG_FLASH_BASE 0xFFF00000 */
#define CFG_FLASH_BASE (0-flash_info[0].size) /* Put flash at end */
#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE)
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
#endif
#define CFG_MONITOR_BASE 0xFFF00000
/*%%% #define CFG_MONITOR_BASE CFG_FLASH_BASE */
#define CFG_MONITOR_BASE TEXT_BASE
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/*
......@@ -173,18 +169,17 @@
* FLASH organization
*/
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT 35 /* max number of sectors on one chip */
#define CFG_MAX_FLASH_SECT 67 /* max number of sectors on one chip */
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_OFFSET 0x00740000 /* Offset of Environment Sector */
#define CFG_ENV_ADDR ((TEXT_BASE) + 0x40000)
#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */
#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
/* Address and size of Redundant Environment Sector */
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE)
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR+CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
/*-----------------------------------------------------------------------
......@@ -317,8 +312,8 @@
* BR0 and OR0 (FLASH)
*/
#define FLASH_BASE_PRELIM 0xFE000000 /* FLASH base */
#define CFG_PRELIM_OR_AM 0xFE000000 /* OR addr mask */
#define FLASH_BASE_PRELIM 0xFC000000 /* FLASH base - up to 64 MB of flash */
#define CFG_PRELIM_OR_AM 0xFC000000 /* OR addr mask - map 64 MB */
/* FLASH timing: ACS = 0, TRLX = 0, CSNT = 0, SCY = 4, ETHR = 0, BIH = 1 */
#define CFG_OR_TIMING_FLASH (OR_SCY_4_CLK | OR_BI)
......@@ -340,9 +335,13 @@
#define CFG_BR1_PRELIM ((SDRAM_BASE_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
/* RPXLITE mem setting */
#define CFG_BR3_PRELIM 0xFA400001 /* BCSR */
#define CFG_NVRAM_BASE 0xFA000000 /* NVRAM & SRAM base */
/* IMMR: 0xFA200000 IMMR base address - see above */
#define CFG_BCSR_BASE 0xFA400000 /* BCSR base address */
#define CFG_BR3_PRELIM (CFG_BCSR_BASE | BR_V) /* BCSR */
#define CFG_OR3_PRELIM 0xFFFF8910
#define CFG_BR4_PRELIM 0xFA000401 /* NVRAM&SRAM */
#define CFG_BR4_PRELIM (CFG_NVRAM_BASE | BR_PS_8 | BR_V) /* NVRAM & SRAM */
#define CFG_OR4_PRELIM 0xFFFE0970
/*
......@@ -381,10 +380,10 @@
*
*/
#define BCSR0 0xFA400000
#define BCSR1 0xFA400001
#define BCSR2 0xFA400002
#define BCSR3 0xFA400003
#define BCSR0 (CFG_BCSR_BASE + 0)
#define BCSR1 (CFG_BCSR_BASE + 1)
#define BCSR2 (CFG_BCSR_BASE + 2)
#define BCSR3 (CFG_BCSR_BASE + 3)
#define BCSR0_ENMONXCVR 0x01 /* Monitor XVCR Control */
#define BCSR0_ENNVRAM 0x02 /* CS4# Control */
......
......@@ -84,15 +84,15 @@ void nand_init (void);
static char *failed = "*** failed ***\n";
#if defined(CONFIG_PCU_E) || defined(CONFIG_OXC)
extern flash_info_t flash_info[];
#endif
#include <environment.h>
#if ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
(CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
defined(CFG_ENV_IS_IN_NVRAM)
#if defined(CFG_ENV_IS_EMBEDDED)
#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
#elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
(CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
defined(CFG_ENV_IS_IN_NVRAM)
#define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
#else
#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
......@@ -684,10 +684,8 @@ void board_init_r (gd_t *id, ulong dest_addr)
s = getenv ("flashchecksum");
if (s && (*s == 'y')) {
printf (" CRC: %08lX",
crc32 (0,
(const unsigned char *) CFG_FLASH_BASE,
flash_size)
);
crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
);
}
putc ('\n');
# else /* !CFG_FLASH_CHECKSUM */
......@@ -700,8 +698,9 @@ void board_init_r (gd_t *id, ulong dest_addr)
bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC)
bd->bi_flashoffset = 0;
# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
/* flash mapped at end of memory map */
bd->bi_flashoffset = TEXT_BASE + flash_size;
# elif CFG_MONITOR_BASE == CFG_FLASH_BASE
bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
# else
......@@ -901,8 +900,6 @@ void board_init_r (gd_t *id, ulong dest_addr)
set_timer (0);
/* Insert function pointers now that we have relocated the code */
/* Initialize from environment */
if ((s = getenv ("loadaddr")) != NULL) {
load_addr = simple_strtoul (s, NULL, 16);
......
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