Add Barco Streaming Video Card (SVC) and Sample Compress Network (SCN) board

Patch by Marc Leeman, 04 Mar 2005

CHANGELOG

@@ -2,6 +2,9 @@
 Changes for U-Boot 1.1.4:
 ======================================================================
 
+* Add Barco Streaming Video Card (SVC) and Sample Compress Network (SCN) board
+  Patch by Marc Leeman, 04 Mar 2005
+
 * OMAP242x H4 board update
   - fix for ES2 differences.
   - switch to using the cfi_flash driver.

CREDITS

@@ -255,6 +255,11 @@ N: Thomas Lange
 E: thomas@corelatus.se
 D: Support for GTH and dbau1x00 boards; lots of PCMCIA fixes
 
+N: Marc Leeman
+E: marc.leeman@barco.com
+D: Support for Barco Streaming Video Card (SVC) and Sample Compress Network (SCN)
+W: www.barco.com
+
 N: The LEOX team
 E: team@leox.org
 D: Support for LEOX boards, DS164x RTC

MAKEALL

@@ -88,11 +88,11 @@ LIST_8220="	\
 #########################################################################
 
 LIST_824x="	\
-	A3000		BMW		CPC45		CU824		\
-	debris		eXalion		HIDDEN_DRAGON	MOUSSE		\
-	MUSENKI		MVBLUE		OXC		PN62		\
-	Sandpoint8240	Sandpoint8245	SL8245		utx8245		\
-	sbc8240 \
+	A3000		barco		BMW		CPC45		\
+	CU824		debris		eXalion		HIDDEN_DRAGON	\
+	MOUSSE		MUSENKI		MVBLUE		OXC		\
+	PN62		Sandpoint8240	Sandpoint8245	sbc8240		\
+	SL8245		utx8245						\
 "
 
 #########################################################################

Makefile

@@ -929,6 +929,9 @@ xtract_82xx = $(subst _BIGFLASH,,$(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,
 A3000_config: unconfig
 	@./mkconfig $(@:_config=) ppc mpc824x a3000
 
+barco_config: unconfig
+	@./mkconfig $(@:_config=) ppc mpc824x barco
+
 BMW_config: unconfig
 	@./mkconfig $(@:_config=) ppc mpc824x bmw
 

board/barco/Makefile

+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS =  $(BOARD).o flash.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend:	Makefile $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################

board/barco/README

+This port of U-Boot is tuned to run on a range of Barco Control Rooms
+Streaming Video Solutions, including:
+
+   - Streaming Video Card (SVC)
+   - Sample Compress Network (SCN)
+
+For more information, see http://www.barcocontrolrooms.com/
+
+Code and configuration are originally based on the Sandpoint board
+
+Marc Leeman <marc.leeman@barco.com>

board/barco/barco.c

+/********************************************************************
+ *
+ * Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
+ *
+ * $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/barco.c,v $
+ * $Revision: 1.4 $
+ * $Author: mleeman $
+ * $Date: 2005/03/02 16:40:20 $
+ *
+ * Last ChangeLog Entry
+ * $Log: barco.c,v $
+ * Revision 1.4  2005/03/02 16:40:20  mleeman
+ * remove empty labels (3.4 complains)
+ *
+ * Revision 1.3  2005/02/21 12:48:58  mleeman
+ * update of copyright years (feedback wd)
+ *
+ * Revision 1.2  2005/02/21 10:10:53  mleeman
+ * - split up switch statement to a function call (Linux kernel coding guidelines)
+ *   ( feedback wd)
+ *
+ * Revision 1.1  2005/02/14 09:31:07  mleeman
+ * renaming of files
+ *
+ * Revision 1.1  2005/02/14 09:23:46  mleeman
+ * - moved 'barcohydra' directory to a more generic barco; since we will be
+ *   supporting and adding multiple boards
+ *
+ * Revision 1.3  2005/02/10 13:57:32  mleeman
+ * fixed flash corruption: I should exit from the moment I find the correct value
+ *
+ * Revision 1.2  2005/02/09 12:56:23  mleeman
+ * add generic header to track changes in sources
+ *
+ *
+ *******************************************************************/
+
+/*
+ * (C) Copyright 2004
+ * Marc Leeman <marc.leeman@barco.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+#include <pci.h>
+#include <malloc.h>
+#include <command.h>
+
+#include "config.h"
+#include "barco_svc.h"
+
+#define TRY_WORKING  (3)
+#define BOOT_DEFAULT (2)
+#define BOOT_WORKING (1)
+
+int checkboard (void)
+{
+	/*TODO: Check processor type */
+
+	puts (	"Board: Streaming Video Card for Hydra systems "
+#ifdef CONFIG_MPC8240
+		"8240"
+#endif
+#ifdef CONFIG_MPC8245
+		"8245"
+#endif
+		" Unity ##Test not implemented yet##\n");
+	return 0;
+}
+
+long int initdram (int board_type)
+{
+	long size;
+	long new_bank0_end;
+	long mear1;
+	long emear1;
+
+	size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
+
+	new_bank0_end = size - 1;
+	mear1 = mpc824x_mpc107_getreg(MEAR1);
+	emear1 = mpc824x_mpc107_getreg(EMEAR1);
+	mear1 = (mear1  & 0xFFFFFF00) |
+		((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
+	emear1 = (emear1 & 0xFFFFFF00) |
+		((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
+	mpc824x_mpc107_setreg(MEAR1, mear1);
+	mpc824x_mpc107_setreg(EMEAR1, emear1);
+
+	return (size);
+}
+
+/*
+ * Initialize PCI Devices, report devices found.
+ */
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_barcohydra_config_table[] = {
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
+	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
+				       PCI_ENET0_MEMADDR,
+				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
+	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
+				       PCI_ENET1_MEMADDR,
+				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
+	{ }
+};
+#endif
+
+struct pci_controller hose = {
+#ifndef CONFIG_PCI_PNP
+	config_table: pci_barcohydra_config_table,
+#endif
+};
+
+void pci_init_board(void)
+{
+	pci_mpc824x_init(&hose);
+}
+
+int write_flash(char *addr, char value)
+{
+	char *adr = (char *)0xFF800000;
+	int cnt = 0;
+	char status,oldstatus;
+	*(adr+0x55) = 0xAA;
+
+	udelay(1);
+	*(adr+0xAA) = 0x55;
+	udelay(1);
+	*(adr+0x55) = 0xA0;
+	udelay(1);
+	*addr = value;
+
+	status = *addr;
+	do{
+
+		oldstatus = status;
+		status = *addr;
+
+		if ((oldstatus & 0x40) == (status & 0x40)){
+			return 4;
+		}
+		cnt++;
+		if (cnt > 10000){
+			return 2;
+		}
+	}while( (status & 0x20) == 0 );
+
+	oldstatus = *addr;
+	status = *addr;
+
+	if ((oldstatus & 0x40) == (status & 0x40)) return 0;
+	else {
+		*(adr+0x55) = 0xF0;
+		return 1;
+	}
+}
+
+unsigned update_flash(unsigned char* buf){
+	switch((*buf) & 0x3){
+		case TRY_WORKING:
+			printf("found 3 and converted it to 2\n");
+			write_flash(buf, (*buf) & 0xFE);
+			*((unsigned char *)0xFF800000) = 0xF0;
+			udelay(100);
+			printf("buf [%#010x] %#010x\n",buf,(*buf));
+		case BOOT_WORKING :
+			return BOOT_WORKING;
+	}
+	return BOOT_DEFAULT;
+}
+
+unsigned scan_flash(void)
+{
+	char section[] =  "kernel";
+	ulong   sp;
+	int cfgFileLen  =  (CFG_FLASH_ERASE_SECTOR_LENGTH >> 1);
+	int sectionPtr  = 0;
+	int foundItem   = 0; /* 0: None, 1: section found, 2: "=" found */
+	int bufPtr;
+	unsigned char *buf;
+
+	buf = (unsigned char*)(CFG_FLASH_RANGE_BASE + CFG_FLASH_RANGE_SIZE \
+			- CFG_FLASH_ERASE_SECTOR_LENGTH);
+	for(bufPtr = 0; bufPtr < cfgFileLen; ++bufPtr){
+		if ((buf[bufPtr]==0xFF) && (*(int*)(buf+bufPtr)==0xFFFFFFFF)) {
+			return BOOT_DEFAULT;
+		}
+		switch(foundItem)
+		{
+			/* This is the scanning loop, we try to find a particular
+			 * quoted value
+			 */
+			case 0:
+				if((section[sectionPtr] == 0)){
+					++foundItem;
+				}
+				else if(buf[bufPtr] == section[sectionPtr]){
+					++sectionPtr;
+				}
+				else {
+					sectionPtr = 0;
+				}
+				break;
+			case 1:
+				++foundItem;
+				break;
+			case 2:
+				++foundItem;
+				break;
+			case 3:
+			default:
+				return update_flash(buf[bufPtr - 1]);
+		}
+	}
+
+	printf("Failed to read %s\n",section);
+	return BOOT_DEFAULT;
+}
+
+TSBootInfo* find_boot_info(void)
+{
+	unsigned bootimage = scan_flash();
+	TSBootInfo* info = (TSBootInfo*)malloc(sizeof(TSBootInfo));
+
+	switch(bootimage){
+		case TRY_WORKING:
+				info->address = CFG_WORKING_KERNEL_ADDRESS;
+				break;
+		case BOOT_WORKING :
+				info->address = CFG_WORKING_KERNEL_ADDRESS;
+				break;
+		case BOOT_DEFAULT:
+		default:
+				info->address= CFG_DEFAULT_KERNEL_ADDRESS;
+
+	}
+	info->size = *((unsigned int *)(info->address ));
+
+	return info;
+}
+
+void barcobcd_boot(void)
+{
+	TSBootInfo* start;
+	char *bootm_args[2];
+	char *buf;
+	int cnt;
+
+	buf = (char *)(0x00800000);
+	/* make certain there are enough chars to print the command line here!
+	 */
+	bootm_args[0]=(char *)malloc(16*sizeof(char));
+	bootm_args[1]=(char *)malloc(16*sizeof(char));
+
+	start = find_boot_info();
+
+	printf("Booting kernel at address %#10x with size %#10x\n",
+			start->address, start->size);
+
+	/* give length of the kernel image to bootm */
+	sprintf(bootm_args[0],"%x",start->size);
+	/* give address of the kernel image to bootm */
+	sprintf(bootm_args[1],"%x",buf);
+
+	printf("flash address: %#10x\n",start->address+8);
+	printf("buf address: %#10x\n",buf);
+
+	/* aha, we reserve 8 bytes here... */
+	for (cnt = 0; cnt < start->size ; cnt++){
+		buf[cnt] = ((char *)start->address)[cnt+8];
+	}
+
+	/* initialise RAM memory */
+	*((unsigned int *)0xFEC00000) = 0x00141A98;
+	do_bootm(NULL,0,2,bootm_args);
+}
+
+int barcobcd_boot_image(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+#if 0
+	if (argc > 1) {
+		printf ("Usage:\n (%d) %s\n", argc, cmdtp->usage);
+		return 1;
+	}
+#endif
+	barcobcd_boot();
+
+	return 0;
+}
+
+/* Currently, boot_working and boot_default are the same command. This is
+ * left in here to see what we'll do in the future */
+
+U_BOOT_CMD(
+		try_working, 1, 1, barcobcd_boot_image,
+		" try_working - check flash value and boot the appropriate image\n",
+		"\n"
+	  );
+
+U_BOOT_CMD(
+		boot_working, 1, 1, barcobcd_boot_image,
+		" boot_working - check flash value and boot the appropriate image\n",
+		"\n"
+	  );
+
+U_BOOT_CMD(
+		boot_default, 1, 1, barcobcd_boot_image,
+		" boot_default - check flash value and boot the appropriate image\n",
+		"\n"
+	  );
+/*
+ * We are not using serial communication, so just provide empty functions
+ */
+int serial_init(void){return 0;}
+void serial_setbrg(void){}
+void serial_putc(const char c){}
+void serial_puts(const char *c){}
+void serial_addr(unsigned int i){}
+int serial_getc(void){return 0;}
+int serial_tstc(void){return 0;}
+
+unsigned long post_word_load(void){return 0l;};
+void post_word_store(unsigned long val){}

board/barco/barco_svc.h

+/********************************************************************
+ *
+ * Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
+ *
+ * $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/barco_svc.h,v $
+ * $Revision: 1.2 $
+ * $Author: mleeman $
+ * $Date: 2005/02/21 12:48:58 $
+ *
+ * Last ChangeLog Entry
+ * $Log: barco_svc.h,v $
+ * Revision 1.2  2005/02/21 12:48:58  mleeman
+ * update of copyright years (feedback wd)
+ *
+ * Revision 1.1  2005/02/14 09:31:07  mleeman
+ * renaming of files
+ *
+ * Revision 1.1  2005/02/14 09:23:46  mleeman
+ * - moved 'barcohydra' directory to a more generic barco; since we will be
+ *   supporting and adding multiple boards
+ *
+ * Revision 1.1  2005/02/08 15:40:19  mleeman
+ * modified and added platform files
+ *
+ * Revision 1.2  2005/01/25 08:05:04  mleeman
+ * more cleanup of the code
+ *
+ * Revision 1.1  2004/07/20 08:49:55  mleeman
+ * Working version of the default and nfs kernel booting.
+ *
+ *
+ *******************************************************************/
+
+#ifndef _LOCAL_BARCOHYDRA_H_
+#define _LOCAL_BARCOHYDRA_H_
+
+#include <flash.h>
+#include <asm/io.h>
+
+/* Defines for the barcohydra board */
+#ifndef CFG_FLASH_ERASE_SECTOR_LENGTH
+#define CFG_FLASH_ERASE_SECTOR_LENGTH (0x10000)
+#endif
+
+#ifndef CFG_DEFAULT_KERNEL_ADDRESS
+#define CFG_DEFAULT_KERNEL_ADDRESS (CFG_FLASH_BASE + 0x30000)
+#endif
+
+#ifndef CFG_WORKING_KERNEL_ADDRESS
+#define CFG_WORKING_KERNEL_ADDRESS (0xFFE00000)
+#endif
+
+
+typedef struct SBootInfo {
+	unsigned int address;
+	unsigned int size;
+	unsigned char state;
+}TSBootInfo;
+
+/* barcohydra.c */
+int checkboard(void);
+long int initdram(int board_type);
+void pci_init_board(void);
+void check_flash(void);
+int write_flash(char *addr, char value);
+TSBootInfo* find_boot_info(void);
+void final_boot(void);
+#endif

board/barco/config.mk

+#
+# (C) Copyright 2000, 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# Barco Hydra/SCN boards
+#
+
+TEXT_BASE = 0xFFF00000
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)

board/barco/early_init.S

+/*
+ * (C) Copyright 2001
+ * Thomas Koeller, tkoeller@gmx.net
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef	__ASSEMBLY__
+#define __ASSEMBLY__	1
+#endif
+
+#include <config.h>
+#include <asm/processor.h>
+#include <mpc824x.h>
+#include <ppc_asm.tmpl>
+
+#if defined(USE_DINK32)
+  /* We are running from RAM, so do not clear the MCCR1_MEMGO bit! */
+  #define MCCR1VAL ((CFG_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CFG_ROMFAL << MCCR1_ROMFAL_SHIFT) | MCCR1_MEMGO)
+#else
+  #define MCCR1VAL (CFG_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CFG_ROMFAL << MCCR1_ROMFAL_SHIFT)
+#endif
+
+	.text
+
+	/* Values to program into memory controller registers */
+tbl:	.long	MCCR1, MCCR1VAL
+	.long	MCCR2, CFG_REFINT << MCCR2_REFINT_SHIFT
+	.long	MCCR3
+	.long	(((CFG_BSTOPRE & 0x000000f0) >> 4) << MCCR3_BSTOPRE2TO5_SHIFT) | \
+		(CFG_REFREC << MCCR3_REFREC_SHIFT) | \
+		(CFG_RDLAT  << MCCR3_RDLAT_SHIFT)
+	.long	MCCR4
+	.long	(CFG_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CFG_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \
+		(CFG_REGISTERD_TYPE_BUFFER << 20) | \
+		(((CFG_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \
+		((CFG_SDMODE_CAS_LAT << 4) | (CFG_SDMODE_WRAP << 3) | \
+		(CFG_SDMODE_BURSTLEN) << MCCR4_SDMODE_SHIFT) | \
+		(CFG_ACTTORW << MCCR4_ACTTORW_SHIFT) | \
+		((CFG_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT )
+	.long	MSAR1
+	.long	(((CFG_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  0) | \
+		(((CFG_BANK1_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  8) | \
+		(((CFG_BANK2_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
+		(((CFG_BANK3_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
+	.long	EMSAR1
+	.long	(((CFG_BANK0_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  0) | \
+		(((CFG_BANK1_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  8) | \
+		(((CFG_BANK2_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
+		(((CFG_BANK3_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
+	.long	MSAR2
+	.long	(((CFG_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  0) | \
+		(((CFG_BANK5_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  8) | \
+		(((CFG_BANK6_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
+		(((CFG_BANK7_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
+	.long	EMSAR2
+	.long	(((CFG_BANK4_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  0) | \
+		(((CFG_BANK5_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  8) | \
+		(((CFG_BANK6_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
+		(((CFG_BANK7_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
+	.long	MEAR1
+	.long	(((CFG_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  0) | \
+		(((CFG_BANK1_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  8) | \
+		(((CFG_BANK2_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
+		(((CFG_BANK3_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
+	.long	EMEAR1
+	.long	(((CFG_BANK0_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  0) | \
+		(((CFG_BANK1_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  8) | \
+		(((CFG_BANK2_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
+		(((CFG_BANK3_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
+	.long	MEAR2
+	.long	(((CFG_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  0) | \
+		(((CFG_BANK5_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  8) | \
+		(((CFG_BANK6_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
+		(((CFG_BANK7_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
+	.long	EMEAR2
+	.long	(((CFG_BANK4_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  0) | \
+		(((CFG_BANK5_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  8) | \
+		(((CFG_BANK6_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
+		(((CFG_BANK7_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
+	.long	0
+
+
+	/*
+	 * Early CPU initialization. Set up memory controller, so we can access any RAM at all. This
+	 * must be done in assembly, since we have no stack at this point.
+	 */
+	.global	early_init_f
+early_init_f:
+	mflr	r10
+
+	/* basic memory controller configuration */
+	lis	r3, CONFIG_ADDR_HIGH
+	lis	r4, CONFIG_DATA_HIGH
+	bl	lab
+lab:	mflr	r5
+	lwzu	r0, tbl - lab(r5)
+loop:	lwz	r1, 4(r5)
+	stwbrx	r0, 0, r3
+	eieio
+	stwbrx	r1, 0, r4
+	eieio
+	lwzu	r0, 8(r5)
+	cmpli	cr0, 0, r0, 0
+	bne	cr0, loop
+
+	/* set bank enable bits */
+	lis	r0, MBER@h
+	ori	r0, 0, MBER@l
+	li	r1, CFG_BANK_ENABLE
+	stwbrx	r0, 0, r3
+	eieio
+	stb	r1, 0(r4)
+	eieio
+
+	/* delay loop */
+	lis	r0, 0x0003
+	mtctr   r0
+delay:	bdnz	delay
+
+	/* enable memory controller */
+	lis	r0, MCCR1@h
+	ori	r0, 0, MCCR1@l
+	stwbrx	r0, 0, r3
+	eieio
+	lwbrx	r0, 0, r4
+	oris	r0, 0, MCCR1_MEMGO@h
+	stwbrx	r0, 0, r4
+	eieio
+
+	/* set up stack pointer */
+	lis	r1, CFG_INIT_SP_OFFSET@h
+	ori	r1, r1, CFG_INIT_SP_OFFSET@l
+
+	mtlr	r10
+	blr

board/barco/speed.h

+/********************************************************************
+ *
+ * Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
+ *
+ * $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/speed.h,v $
+ * $Revision: 1.2 $
+ * $Author: mleeman $
+ * $Date: 2005/02/21 12:48:58 $
+ *
+ * Last ChangeLog Entry
+ * $Log: speed.h,v $
+ * Revision 1.2  2005/02/21 12:48:58  mleeman
+ * update of copyright years (feedback wd)
+ *
+ * Revision 1.1  2005/02/14 09:23:46  mleeman
+ * - moved 'barcohydra' directory to a more generic barco; since we will be
+ *   supporting and adding multiple boards
+ *
+ * Revision 1.2  2005/02/09 12:56:23  mleeman
+ * add generic header to track changes in sources
+ *
+ *
+ *******************************************************************/
+
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *