Commit 904ec57b authored by Michael Schwingen's avatar Michael Schwingen Committed by Albert ARIBAUD

update/fix PDNB3 board

Signed-off-by: default avatarMichael Schwingen <michael@schwingen.org>
parent 973af335
#
CONFIG_SYS_TEXT_BASE = 0x01f00000
......@@ -50,9 +50,6 @@
/*
* Misc configuration options
*/
#define CONFIG_USE_IRQ 1 /* we need IRQ stuff for timer */
#define CONFIG_TIMER_IRQ
#define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */
#define CONFIG_SYS_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */
......@@ -117,6 +114,7 @@
#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */
#define CONFIG_IXP425_TIMER_CLK 66666666
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
......@@ -188,6 +186,7 @@
#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
#define CONFIG_SYS_TEXT_BASE 0x50000000
#define CONFIG_SYS_FLASH_BASE 0x50000000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
#if defined(CONFIG_SCPU)
......@@ -345,4 +344,9 @@
*/
#define CONFIG_SYS_CACHELINE_SIZE 32
/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
#endif /* __CONFIG_H */
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