Commit 96c5f081 authored by Stefan Roese's avatar Stefan Roese Committed by Tom Rini

arm: kirkwood: Change naming of dram functions from km_foo() to mvebu_foo()

Additionally the SDRAM address decoding register address is not hard coded
in the C code any more. A define is introduced for this base address.

This makes is possible to use those gpio functions from other MVEBU SoC's
as well.
Signed-off-by: default avatarStefan Roese <sr@denx.de>
Tested-by: default avatarLuka Perkov <luka@openwrt.org>
Acked-by: default avatarPrafulla Wadaskar <prafulla@marvell.com>
parent 4fd7717e
......@@ -140,9 +140,9 @@ struct kwgpio_registers {
* functions
*/
unsigned char get_random_hex(void);
unsigned int kw_sdram_bar(enum memory_bank bank);
unsigned int kw_sdram_bs(enum memory_bank bank);
void kw_sdram_size_adjust(enum memory_bank bank);
unsigned int mvebu_sdram_bar(enum memory_bank bank);
unsigned int mvebu_sdram_bs(enum memory_bank bank);
void mvebu_sdram_size_adjust(enum memory_bank bank);
int kw_config_adr_windows(void);
void mvebu_config_gpio(unsigned int gpp0_oe_val, unsigned int gpp1_oe_val,
unsigned int gpp0_oe, unsigned int gpp1_oe);
......
......@@ -22,6 +22,7 @@
#define KW_REG_UNDOC_0x1470 (KW_REGISTER(0x1470))
#define KW_REG_UNDOC_0x1478 (KW_REGISTER(0x1478))
#define MVEBU_SDRAM_BASE (KW_REGISTER(0x1500))
#define KW_TWSI_BASE (KW_REGISTER(0x11000))
#define KW_UART0_BASE (KW_REGISTER(0x12000))
#define KW_UART1_BASE (KW_REGISTER(0x12100))
......
......@@ -14,27 +14,27 @@
DECLARE_GLOBAL_DATA_PTR;
struct kw_sdram_bank {
struct sdram_bank {
u32 win_bar;
u32 win_sz;
};
struct kw_sdram_addr_dec {
struct kw_sdram_bank sdram_bank[4];
struct sdram_addr_dec {
struct sdram_bank sdram_bank[4];
};
#define KW_REG_CPUCS_WIN_ENABLE (1 << 0)
#define KW_REG_CPUCS_WIN_WR_PROTECT (1 << 1)
#define KW_REG_CPUCS_WIN_WIN0_CS(x) (((x) & 0x3) << 2)
#define KW_REG_CPUCS_WIN_SIZE(x) (((x) & 0xff) << 24)
#define REG_CPUCS_WIN_ENABLE (1 << 0)
#define REG_CPUCS_WIN_WR_PROTECT (1 << 1)
#define REG_CPUCS_WIN_WIN0_CS(x) (((x) & 0x3) << 2)
#define REG_CPUCS_WIN_SIZE(x) (((x) & 0xff) << 24)
/*
* kw_sdram_bar - reads SDRAM Base Address Register
* mvebu_sdram_bar - reads SDRAM Base Address Register
*/
u32 kw_sdram_bar(enum memory_bank bank)
u32 mvebu_sdram_bar(enum memory_bank bank)
{
struct kw_sdram_addr_dec *base =
(struct kw_sdram_addr_dec *)KW_REGISTER(0x1500);
struct sdram_addr_dec *base =
(struct sdram_addr_dec *)MVEBU_SDRAM_BASE;
u32 result = 0;
u32 enable = 0x01 & readl(&base->sdram_bank[bank].win_sz);
......@@ -46,31 +46,31 @@ u32 kw_sdram_bar(enum memory_bank bank)
}
/*
* kw_sdram_bs_set - writes SDRAM Bank size
* mvebu_sdram_bs_set - writes SDRAM Bank size
*/
static void kw_sdram_bs_set(enum memory_bank bank, u32 size)
static void mvebu_sdram_bs_set(enum memory_bank bank, u32 size)
{
struct kw_sdram_addr_dec *base =
(struct kw_sdram_addr_dec *)KW_REGISTER(0x1500);
struct sdram_addr_dec *base =
(struct sdram_addr_dec *)MVEBU_SDRAM_BASE;
/* Read current register value */
u32 reg = readl(&base->sdram_bank[bank].win_sz);
/* Clear window size */
reg &= ~KW_REG_CPUCS_WIN_SIZE(0xFF);
reg &= ~REG_CPUCS_WIN_SIZE(0xFF);
/* Set new window size */
reg |= KW_REG_CPUCS_WIN_SIZE((size - 1) >> 24);
reg |= REG_CPUCS_WIN_SIZE((size - 1) >> 24);
writel(reg, &base->sdram_bank[bank].win_sz);
}
/*
* kw_sdram_bs - reads SDRAM Bank size
* mvebu_sdram_bs - reads SDRAM Bank size
*/
u32 kw_sdram_bs(enum memory_bank bank)
u32 mvebu_sdram_bs(enum memory_bank bank)
{
struct kw_sdram_addr_dec *base =
(struct kw_sdram_addr_dec *)KW_REGISTER(0x1500);
struct sdram_addr_dec *base =
(struct sdram_addr_dec *)MVEBU_SDRAM_BASE;
u32 result = 0;
u32 enable = 0x01 & readl(&base->sdram_bank[bank].win_sz);
......@@ -81,15 +81,16 @@ u32 kw_sdram_bs(enum memory_bank bank)
return result;
}
void kw_sdram_size_adjust(enum memory_bank bank)
void mvebu_sdram_size_adjust(enum memory_bank bank)
{
u32 size;
/* probe currently equipped RAM size */
size = get_ram_size((void *)kw_sdram_bar(bank), kw_sdram_bs(bank));
size = get_ram_size((void *)mvebu_sdram_bar(bank),
mvebu_sdram_bs(bank));
/* adjust SDRAM window size accordingly */
kw_sdram_bs_set(bank, size);
mvebu_sdram_bs_set(bank, size);
}
#ifndef CONFIG_SYS_BOARD_DRAM_INIT
......@@ -99,8 +100,8 @@ int dram_init(void)
gd->ram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = kw_sdram_bar(i);
gd->bd->bi_dram[i].size = kw_sdram_bs(i);
gd->bd->bi_dram[i].start = mvebu_sdram_bar(i);
gd->bd->bi_dram[i].size = mvebu_sdram_bs(i);
/*
* It is assumed that all memory banks are consecutive
* and without gaps.
......
......@@ -77,7 +77,7 @@ int board_init(void)
gd->bd->bi_arch_number = MACH_TYPE_NET2BIG_V2;
/* Boot parameters address */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -73,7 +73,7 @@ int board_init(void)
gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
/* Boot parameters address */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -112,7 +112,7 @@ int board_init(void)
gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
/* Boot parameters address */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -90,7 +90,7 @@ int board_early_init_f(void)
int board_init(void)
{
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -92,7 +92,7 @@ int board_init(void)
gd->bd->bi_arch_number = MACH_TYPE_GURUPLUG;
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -94,7 +94,7 @@ int board_init(void)
gd->bd->bi_arch_number = MACH_TYPE_MV88F6281GTW_GE;
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -104,7 +104,7 @@ int board_init(void)
#endif
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -93,7 +93,7 @@ int board_init(void)
gd->bd->bi_arch_number = MACH_TYPE_RD88F6281;
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -92,7 +92,7 @@ int board_init(void)
gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -96,7 +96,7 @@ int board_init(void)
gd->bd->bi_arch_number = MACH_TYPE_DOCKSTAR;
/* address of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -98,7 +98,7 @@ int board_init(void)
gd->bd->bi_arch_number = MACH_TYPE_GOFLEXHOME;
/* address of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -168,7 +168,7 @@ static void set_led(int state)
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
set_led(LED_POWER_BLINKING);
......
......@@ -64,7 +64,7 @@ int board_early_init_f(void)
int board_init(void)
{
/* Boot parameters address */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -92,7 +92,7 @@ int board_early_init_f(void)
int board_init(void)
{
/* Boot parameters address */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -87,7 +87,7 @@ int board_early_init_f(void)
int board_init(void)
{
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......@@ -97,7 +97,7 @@ int board_init(void)
gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
......
......@@ -226,7 +226,7 @@ int board_early_init_f(void)
writel(tmp & (~KM_KIRKWOOD_SOFT_I2C_GPIOS) , MVEBU_GPIO0_BASE + 4);
#endif
/* adjust SDRAM size for bank 0 */
kw_sdram_size_adjust(0);
mvebu_sdram_size_adjust(0);
kirkwood_mpp_conf(kwmpp_config, NULL);
return 0;
}
......@@ -234,7 +234,7 @@ int board_early_init_f(void)
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
/*
* The KM_FLASH_GPIO_PIN switches between using a
......
......@@ -62,7 +62,7 @@ int board_early_init_f(void)
int board_init(void)
{
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
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