Commit 9f03247e authored by Tom Rini's avatar Tom Rini

Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze

parents 89ca873e 766d2609
......@@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
#ifdef CONFIG_CMD_NET
#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
static int dev_valid_net(void *cookie)
{
......
......@@ -669,6 +669,8 @@ config ARCH_ZYNQMP
select OF_CONTROL
select DM_SERIAL
select SUPPORT_SPL
select CLK
select SPL_CLK
config TEGRA
bool "NVIDIA Tegra"
......
......@@ -12,22 +12,6 @@
DECLARE_GLOBAL_DATA_PTR;
unsigned long get_uart_clk(int dev_id)
{
u32 ver = zynqmp_get_silicon_version();
switch (ver) {
case ZYNQMP_CSU_VERSION_VELOCE:
return 48000;
case ZYNQMP_CSU_VERSION_EP108:
return 25000000;
case ZYNQMP_CSU_VERSION_QEMU:
return 133000000;
}
return 100000000;
}
unsigned long zynqmp_get_system_timer_freq(void)
{
u32 ver = zynqmp_get_silicon_version();
......
......@@ -8,7 +8,6 @@
#ifndef _ASM_ARCH_CLK_H_
#define _ASM_ARCH_CLK_H_
unsigned long get_uart_clk(int dev_id);
unsigned long zynqmp_get_system_timer_freq(void);
#endif /* _ASM_ARCH_CLK_H_ */
......@@ -60,7 +60,7 @@ void __noreturn jump_to_image_linux(void *arg)
typedef void (*image_entry_arg_t)(int, int, void *)
__attribute__ ((noreturn));
image_entry_arg_t image_entry =
(image_entry_arg_t) spl_image.entry_point;
(image_entry_arg_t)(uintptr_t) spl_image.entry_point;
cleanup_before_linux();
image_entry(0, machid, arg);
}
......
......@@ -197,3 +197,9 @@ config CONSOLE_RECORD_IN_SIZE
tstc() and getc() will use this in preference to real device input.
The buffer is allocated immediately after the malloc() region is
ready.
config SYS_NO_FLASH
bool "Disable support for parallel NOR flash"
default n
help
This option is used to disable support for parallel NOR flash.
......@@ -88,7 +88,8 @@ int spl_load_image_fat(struct blk_desc *block_dev,
if (err)
goto end;
err = file_fat_read(filename, (u8 *)spl_image.load_addr, 0);
err = file_fat_read(filename,
(u8 *)(uintptr_t)spl_image.load_addr, 0);
}
end:
......
......@@ -2,15 +2,17 @@ CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_ep"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y
CONFIG_ZYNQMP_USB=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108"
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_CONSOLE is not set
......@@ -41,10 +43,10 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
......
......@@ -2,15 +2,17 @@ CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm015_dc1"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y
CONFIG_ZYNQMP_USB=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1"
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
......@@ -32,10 +34,10 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
......
......@@ -2,15 +2,17 @@ CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm016_dc2"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y
CONFIG_ZYNQMP_USB=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm016-dc2"
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
......@@ -32,10 +34,10 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_NAND_ARASAN=y
......
......@@ -2,14 +2,16 @@ CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm018_dc4"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
......@@ -28,10 +30,10 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
......
......@@ -2,14 +2,16 @@ CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm019_dc5"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5"
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
......@@ -28,9 +30,9 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
......
......@@ -2,14 +2,16 @@ CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_ZYNQMP_USB=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102"
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
......@@ -31,10 +33,10 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y
......
......@@ -2,14 +2,16 @@ CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_ZYNQMP_USB=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB"
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
......@@ -31,10 +33,10 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y
......
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="zynq_microzed"
CONFIG_SYS_CONFIG_NAME="zynq-common"
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-microzed"
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_SYS_NO_FLASH=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
......@@ -38,9 +38,12 @@ CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ZYNQ_GEM=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_STORAGE=y
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Xilinx"
......
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="zynq_picozed"
CONFIG_SYS_CONFIG_NAME="zynq-common"
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-picozed"
CONFIG_SPL=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_SYS_NO_FLASH=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
......@@ -28,9 +28,12 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_ZYNQ_GEM=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_STORAGE=y
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Xilinx"
......
......@@ -6,9 +6,9 @@ CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_SYS_NO_FLASH=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
......@@ -43,9 +43,12 @@ CONFIG_DEBUG_UART_BASE=0xe0001000
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_STORAGE=y
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Xilinx"
......
......@@ -6,9 +6,9 @@ CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_SYS_NO_FLASH=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
......@@ -39,9 +39,12 @@ CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ZYNQ_GEM=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_STORAGE=y
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Xilinx"
......
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="zynq_zc770"
CONFIG_SYS_CONFIG_NAME="zynq-common"
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm010"
CONFIG_SPL=y
......@@ -7,9 +7,9 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM010"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_SYS_NO_FLASH=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
......
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="zynq_zc770"
CONFIG_SYS_CONFIG_NAME="zynq-common"
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011"
CONFIG_SPL=y
......@@ -7,9 +7,9 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM011"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_SYS_NO_FLASH=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
......
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="zynq_zc770"
CONFIG_SYS_CONFIG_NAME="zynq-common"
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm012"
CONFIG_SPL=y
......@@ -7,7 +7,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_GPIO=y
......
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="zynq_zc770"
CONFIG_SYS_CONFIG_NAME="zynq-common"
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm013"
CONFIG_SPL=y
......@@ -7,9 +7,9 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM013"
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_SYS_NO_FLASH=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
......
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="zynq_zed"
CONFIG_SYS_CONFIG_NAME="zynq-common"
CONFIG_ARCH_ZYNQ=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-zed"
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_SYS_NO_FLASH=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
......@@ -38,9 +38,12 @@ CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ZYNQ_GEM=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_STORAGE=y
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Xilinx"
......
......@@ -6,9 +6,9 @@ CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_SYS_NO_FLASH=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
......@@ -41,9 +41,12 @@ CONFIG_DEBUG_UART_BASE=0xe0001000
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_STORAGE=y
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Xilinx"
......
......@@ -21,7 +21,6 @@ static inline struct clk_ops *clk_dev_ops(struct udevice *dev)
}
#if CONFIG_IS_ENABLED(OF_CONTROL)
#ifdef CONFIG_SPL_BUILD
# if CONFIG_IS_ENABLED(OF_PLATDATA)
int clk_get_by_index_platdata(struct udevice *dev, int index,
struct phandle_2_cell *cells, struct clk *clk)
......@@ -38,31 +37,6 @@ int clk_get_by_index_platdata(struct udevice *dev, int index,
return 0;
}
# else
int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
{
int ret;
u32 cell[2];
if (index != 0)
return -ENOSYS;
assert(clk);
ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
if (ret)
return ret;
ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, "clocks",
cell, 2);
if (ret)
return ret;
clk->id = cell[1];
return 0;
}
# endif /* OF_PLATDATA */
int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
{
return -ENOSYS;
}
#else
static int clk_of_xlate_default(struct clk *clk,
struct fdtdec_phandle_args *args)
{
......@@ -119,6 +93,7 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
return clk_request(dev_clk, clk);
}
# endif /* OF_PLATDATA */
int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
{
......@@ -135,7 +110,6 @@ int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
return clk_get_by_index(dev, index, clk);
}
#endif /* CONFIG_SPL_BUILD */
#endif /* OF_CONTROL */
int clk_request(struct udevice *dev, struct clk *clk)
......
......@@ -313,7 +313,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
}
reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
reg &= ~SDHCI_CLOCK_CARD_EN;
reg &= ~(SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN);
sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL);
if (clock == 0)
......
......@@ -5,6 +5,7 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#include <clk.h>
#include <common.h>
#include <debug_uart.h>
#include <dm.h>
......@@ -108,8 +109,33 @@ static int _uart_zynq_serial_putc(struct uart_zynq *regs, const char c)
int zynq_serial_setbrg(struct udevice *dev, int baudrate)
{
struct zynq_uart_priv *priv = dev_get_priv(dev);
unsigned long clock = get_uart_clk(0);
unsigned long clock;
#if defined(CONFIG_CLK) || defined(CONFIG_SPL_CLK)
int ret;
struct clk clk;
ret = clk_get_by_index(dev, 0, &clk);
if (ret < 0) {
dev_err(dev, "failed to get clock\n");
return ret;
}
clock = clk_get_rate(&clk);
if (IS_ERR_VALUE(clock)) {
dev_err(dev, "failed to get rate\n");
return clock;
}
debug("%s: CLK %ld\n", __func__, clock);
ret = clk_enable(&clk);
if (ret && ret != -ENOSYS) {
dev_err(dev, "failed to enable clock\n");
return ret;
}
#else
clock = get_uart_clk(0);
#endif
_uart_zynq_serial_setbrg(priv->regs, clock, baudrate);
return 0;
......
......@@ -85,6 +85,13 @@ config USB_EHCI_MSM
This driver supports combination of Chipidea USB controller
and Synapsys USB PHY in host mode only.
config USB_EHCI_ZYNQ
bool "Support for Xilinx Zynq on-chip EHCI USB controller"
depends on ARCH_ZYNQ
default y
---help---
Enable support for Zynq on-chip EHCI USB controller
config USB_EHCI_GENERIC
bool "Support for generic EHCI USB controller"
depends on OF_CONTROL
......
......@@ -175,10 +175,6 @@
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MFSL
#if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
#else
#endif
#if defined(FLASH)
# define CONFIG_CMD_JFFS2
# define CONFIG_CMD_UBI
......
......@@ -17,6 +17,7 @@
#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9)
#define CONFIG_ZYNQ_EEPROM
#define CONFIG_AHCI
#define CONFIG_SATA_CEVA
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
ZYNQMP_USB1_XHCI_BASEADDR}
......
......@@ -86,10 +86,7 @@
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
#endif
#ifdef CONFIG_ZYNQ_USB
# define CONFIG_USB_EHCI
# define CONFIG_USB_STORAGE
# define CONFIG_USB_EHCI_ZYNQ
#ifdef CONFIG_USB_EHCI_ZYNQ
# define CONFIG_EHCI_IS_TDI
# define CONFIG_USB_MAX_CONTROLLER_COUNT 2
......
/*
* (C) Copyright 2013 Xilinx, Inc.
*
* Configuration for Micro Zynq Evaluation and Development Board - MicroZedBoard
* See zynq-common.h for Zynq common configs
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_ZYNQ_MICROZED_H
#define __CONFIG_ZYNQ_MICROZED_H
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_USB
#include <configs/zynq-common.h>
#endif /* __CONFIG_ZYNQ_MICROZED_H */
/*
* (C) Copyright 2015 Xilinx, Inc.
*
* Configuration for PicoZed
* See zynq-common.h for Zynq common configs
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_ZYNQ_PICOZED_H
#define __CONFIG_ZYNQ_PICOZED_H
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_USB
#include <configs/zynq-common.h>
#endif /* __CONFIG_ZYNQ_PICOZED_H */
......@@ -10,9 +10,6 @@
#ifndef __CONFIG_ZYNQ_ZC70X_H
#define __CONFIG_ZYNQ_ZC70X_H
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_USB
#define CONFIG_ZYNQ_I2C0
#define CONFIG_ZYNQ_EEPROM
......
/*
* (C) Copyright 2013 Xilinx, Inc.
*
* Configuration settings for the Xilinx Zynq ZC770 board.
* See zynq-common.h for Zynq common configs
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_ZYNQ_ZC770_H
#define __CONFIG_ZYNQ_ZC770_H
#define CONFIG_SYS_NO_FLASH