Commit a6c86dec authored by Vivek Gautam's avatar Vivek Gautam Committed by Marek Vasut
Browse files

config: arm: exynos5250: Define CONFIG_SYS_CACHELINE_SIZE



XHCI stack driver needs this to align buffers to
CacheLine boundary. So define the same to be '64'
Signed-off-by: default avatarVivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>
parent 28cfef5f
......@@ -37,6 +37,8 @@
/* Keep L2 Cache Disabled */
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_CACHELINE_SIZE 64
/* Enable ACE acceleration for SHA1 and SHA256 */
#define CONFIG_EXYNOS_ACE_SHA
#define CONFIG_SHA_HW_ACCEL
......
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