Commit ab00e7a2 authored by Wolfgang Denk's avatar Wolfgang Denk

Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx

Conflicts:

	Makefile
Signed-off-by: default avatarWolfgang Denk <wd@denx.de>
parents 4d2ae70e 5ff88934
......@@ -405,7 +405,8 @@ D: Atmel AT91CAP9ADK support
N: Ricardo Ribalda Delgado
E: ricardo.ribalda@uam.es
D: PPC440x5 (Virtex5), ML507 Board, eeprom_simul, adt7460
D: PPC440x5 (Virtex5), ML507 Board, eeprom_simul, adt7460, v5fx30teval
D: Virtex ppc440 generic architecture
W: http://www.ii.uam.es/~rribalda
N: Stefan Roese
......
......@@ -314,6 +314,8 @@ Daniel Poirot <dan.poirot@windriver.com>
Ricardo Ribalda <ricardo.ribalda@uam.es>
ml507 PPC440x5
v5fx30teval PPC440x5
xilinx-pp440-generic PPC440x5
Stefan Roese <sr@denx.de>
......
......@@ -230,12 +230,16 @@ LIST_4xx=" \
sequoia_nand \
taihu \
taishan \
v5fx30teval \
v5fx30teval_flash \
VOH405 \
VOM405 \
W7OLMC \
W7OLMG \
walnut \
WUH405 \
xilinx-ppc440-generic \
xilinx-ppc440-generic_flash \
XPEDITE1K \
yellowstone \
yosemite \
......
......@@ -1242,12 +1242,14 @@ CMS700_config: unconfig
CPCI2DP_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci2dp esd
CPCI405_config \
CPCI4052_config \
CPCI405_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci405 esd
CPCI4052_config \
CPCI405DT_config \
CPCI405AB_config: unconfig
@echo "TEXT_BASE = 0xFFFC0000" > $(obj)board/esd/cpci405/config.tmp
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci405 esd
@echo "BOARD_REVISION = $(@:_config=)" >> $(obj)include/config.mk
CPCIISER4_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpciiser4 esd
......@@ -1356,16 +1358,19 @@ ML2_config: unconfig
ml300_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx ml300 xilinx
ml507_flash_config: unconfig
ml507_flash_config: unconfig
@mkdir -p $(obj)include $(obj)board/xilinx/ml507
@cp board/xilinx/ml507/u-boot-rom.lds $(obj)board/xilinx/ml507/u-boot.lds
@echo "TEXT_BASE = 0xFE360000" > $(obj)board/xilinx/ml507/config.tmp
@$(MKCONFIG) $(@:_flash_config=) ppc ppc4xx ml507 xilinx
@echo "LDSCRIPT := $(obj)board/xilinx/ppc440-generic/u-boot-rom.lds" \
> $(obj)board/xilinx/ml507/config.mk
@echo "TEXT_BASE := 0xFE360000" >> $(obj)board/xilinx/ml507/config.mk
@$(MKCONFIG) ml507 ppc ppc4xx ml507 xilinx
ml507_config: unconfig
ml507_config: unconfig
@mkdir -p $(obj)include $(obj)board/xilinx/ml507
@cp board/xilinx/ml507/u-boot-ram.lds $(obj)board/xilinx/ml507/u-boot.lds
@$(MKCONFIG) $(@:_config=) ppc ppc4xx ml507 xilinx
@echo "LDSCRIPT := $(obj)board/xilinx/ppc440-generic/u-boot-ram.lds" \
> $(obj)board/xilinx/ml507/config.mk
@echo "TEXT_BASE := 0x04000000" >> $(obj)board/xilinx/ml507/config.mk
@$(MKCONFIG) ml507 ppc ppc4xx ml507 xilinx
ocotea_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx ocotea amcc
......@@ -1461,6 +1466,18 @@ taihu_config: unconfig
taishan_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx taishan amcc
v5fx30teval_config: unconfig
@mkdir -p $(obj)include $(obj)board/avnet/v5fx30teval
@echo "LDSCRIPT := $(obj)board/xilinx/ppc440-generic/u-boot-ram.lds" > $(obj)board/avnet/v5fx30teval/config.mk
@echo "TEXT_BASE := 0x03000000" >> $(obj)board/avnet/v5fx30teval/config.mk
@$(MKCONFIG) v5fx30teval ppc ppc4xx v5fx30teval avnet
v5fx30teval_flash_config: unconfig
@mkdir -p $(obj)include $(obj)board/avnet/v5fx30teval
@echo "LDSCRIPT := $(obj)board/xilinx/ppc440-generic/u-boot-rom.lds" > $(obj)board/avnet/v5fx30teval/config.mk
@echo "TEXT_BASE := 0xFF1C0000" >> $(obj)board/avnet/v5fx30teval/config.mk
@$(MKCONFIG) v5fx30teval ppc ppc4xx v5fx30teval avnet
VOH405_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx voh405 esd
......@@ -1479,6 +1496,18 @@ sycamore_config: unconfig
WUH405_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx wuh405 esd
xilinx-ppc440-generic_flash_config: unconfig
@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic/
@echo "LDSCRIPT := $(obj)board/xilinx/ppc440-generic/u-boot-rom.lds" > $(obj)board/xilinx/ppc440-generic/config.mk
@echo "TEXT_BASE := 0xFE360000" >> $(obj)board/xilinx/ppc440-generic/config.mk
@$(MKCONFIG) xilinx-ppc440-generic ppc ppc4xx ppc440-generic xilinx
xilinx-ppc440-generic_config: unconfig
@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic/
@echo "LDSCRIPT := $(obj)board/xilinx/ppc440-generic/u-boot-ram.lds" > $(obj)board/xilinx/ppc440-generic/config.mk
@echo "TEXT_BASE := 0x04000000" >> $(obj)board/xilinx/ppc440-generic/config.mk
@$(MKCONFIG) xilinx-ppc440-generic ppc ppc4xx ppc440-generic xilinx
XPEDITE1K_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx xpedite1k
......
#
# (C) Copyright 2000
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# (C) Copyright 2008
# Ricardo Ribalda,Universidad Autonoma de Madrid, ricardo.ribalda@uam.es
# This work has been supported by: Qtechnology http://qtec.com/
#
# See file CREDITS for list of people who contributed to this
# project.
......@@ -20,8 +21,7 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
ifndef TEXT_BASE
TEXT_BASE = 0x04000000
endif
COBJS += $(BOARD).o
include $(SRCTREE)/board/xilinx/ppc440-generic/Makefile
/*
* (C) Copyright 2008
* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
* This work has been supported by: QTechnology http://qtec.com/
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <config.h>
#include <common.h>
#include <asm/processor.h>
int checkboard(void)
{
puts("Avnet Virtex 5 FX30 Evaluation Board\n");
return 0;
}
/*
* (C) Copyright 2008
* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
* This work has been supported by: QTechnology http://qtec.com/
* based on xparameters.h by Xilinx
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef XPARAMETER_H
#define XPARAMETER_H
#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000
#define XPAR_INTC_0_BASEADDR 0x81800000
#define XPAR_UARTLITE_0_BASEADDR 0x84000000
#define XPAR_FLASH_MEM0_BASEADDR 0xFF000000
#define XPAR_PLB_CLOCK_FREQ_HZ 100000000
#define XPAR_CORE_CLOCK_FREQ_HZ 400000000
#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13
#define XPAR_UARTLITE_0_BAUDRATE 9600
#endif
......@@ -21,20 +21,8 @@
# MA 02111-1307 USA
#
#
# esd CPCI405 boards
#
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
ifeq ($(BOARD_REVISION),CPCI4052)
TEXT_BASE = 0xFFFC0000
else
ifeq ($(BOARD_REVISION),CPCI405DT)
TEXT_BASE = 0xFFFC0000
else
ifeq ($(BOARD_REVISION),CPCI405AB)
TEXT_BASE = 0xFFFC0000
else
ifndef TEXT_BASE
TEXT_BASE = 0xFFFD0000
endif
endif
endif
......@@ -57,22 +57,7 @@ SECTIONS
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
/* . = env_offset;*/
/* common/environment.o(.text)*/
*(.text)
*(.fixup)
......
......@@ -122,7 +122,7 @@ void sdram_panic(const char *reason)
}
#ifdef CONFIG_DDR_ECC
static void blank_string(int size)
void blank_string(int size)
{
int i;
......
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# (C) Copyright 2008
# Ricardo Ribalda,Universidad Autonoma de Madrid, ricardo.ribalda@uam.es
# This work has been supported by: Qtechnology http://qtec.com/
#
# See file CREDITS for list of people who contributed to this
# project.
......@@ -21,38 +22,6 @@
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
endif
COBJS += $(BOARD).o
INCS :=
CFLAGS += $(INCS)
HOST_CFLAGS += $(INCS)
LIB = $(obj)lib$(BOARD).a
COBJS = $(BOARD).o
SOBJS = init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $^
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
include $(SRCTREE)/board/xilinx/ppc440-generic/Makefile
......@@ -20,28 +20,9 @@
#include <common.h>
#include <asm/processor.h>
int board_pre_init(void)
{
return 0;
}
int checkboard(void)
{
puts("ML507 Board\n");
puts("Xilinx ML507 Board\n");
return 0;
}
phys_size_t initdram(int board_type)
{
return get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR,
CFG_SDRAM_SIZE_MB * 1024 * 1024);
}
void get_sys_info(sys_info_t * sysInfo)
{
sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ;
sysInfo->freqPLB = XPAR_PLB_CLOCK_FREQ_HZ;
sysInfo->freqPCI = 0;
return;
}
......@@ -21,15 +21,14 @@
#ifndef XPARAMETER_H
#define XPARAMETER_H
#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000
#define XPAR_IIC_EEPROM_BASEADDR 0x81600000
#define XPAR_INTC_0_BASEADDR 0x81800000
#define XPAR_LLTEMAC_0_BASEADDR 0x81C00000
#define XPAR_UARTLITE_0_BASEADDR 0x84000000
#define XPAR_FLASH_MEM0_BASEADDR 0xFE000000
#define XPAR_PLB_CLOCK_FREQ_HZ 100000000
#define XPAR_CORE_CLOCK_FREQ_HZ 400000000
#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13
#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000
#define XPAR_IIC_EEPROM_BASEADDR 0x81600000
#define XPAR_INTC_0_BASEADDR 0x81800000
#define XPAR_UARTLITE_0_BASEADDR 0x84000000
#define XPAR_FLASH_MEM0_BASEADDR 0xFE000000
#define XPAR_PLB_CLOCK_FREQ_HZ 100000000
#define XPAR_CORE_CLOCK_FREQ_HZ 400000000
#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13
#define XPAR_UARTLITE_0_BAUDRATE 9600
#endif
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2008
# Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
# Work supported by Qtechnology http://www.qtec.com
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
endif
INCS :=
CFLAGS += $(INCS)
HOST_CFLAGS += $(INCS)
LIB = $(obj)lib$(BOARD).a
COBJS += $(SRCTREE)/board/xilinx/ppc440-generic/xilinx_ppc440_generic.o
SOBJS += $(SRCTREE)/board/xilinx/ppc440-generic/init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $^
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
/*
* (C) Copyright 2008
* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
* This work has been supported by: QTechnology http://qtec.com/
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <ppc_asm.tmpl>
#include <config.h>
#include <asm-ppc/mmu.h>
.section .bootpg,"ax"
.globl tlbtab
tlbtab:
tlbtab_start
tlbentry(0x00000000, SZ_256M, 0x00000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0x10000000, SZ_256M, 0x10000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0x20000000, SZ_256M, 0x20000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0x30000000, SZ_256M, 0x30000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0x40000000, SZ_256M, 0x40000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0x50000000, SZ_256M, 0x50000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0x60000000, SZ_256M, 0x60000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0x70000000, SZ_256M, 0x70000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0x80000000, SZ_256M, 0x80000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0x90000000, SZ_256M, 0x90000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0xa0000000, SZ_256M, 0xa0000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0xb0000000, SZ_256M, 0xb0000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0xc0000000, SZ_256M, 0xc0000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0xd0000000, SZ_256M, 0xd0000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0xe0000000, SZ_256M, 0xe0000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbentry(0xf0000000, SZ_256M, 0xf0000000, 0, AC_R | AC_W | AC_X | SA_G | SA_I)
tlbtab_end
/*
* (C) Copyright 2008
* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
* This work has been supported by: QTechnology http://qtec.com/
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <config.h>
#include <common.h>
#include <asm/processor.h>
int __board_pre_init(void)
{
return 0;
}
int board_pre_init(void) __attribute__((weak, alias("__board_pre_init")));
int __checkboard(void)
{
puts("Xilinx PPC440 Generic Board\n");
return 0;
}
int checkboard(void) __attribute__((weak, alias("__checkboard")));
phys_size_t __initdram(int board_type)
{
return get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR,
CFG_SDRAM_SIZE_MB * 1024 * 1024);
}
phys_size_t initdram(int) __attribute__((weak, alias("__initdram")));
void __get_sys_info(sys_info_t *sysInfo)
{
sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ;
sysInfo->freqPLB = XPAR_PLB_CLOCK_FREQ_HZ;
sysInfo->freqPCI = 0;
return;
}
void get_sys_info(sys_info_t *) __attribute__((weak, alias("__get_sys_info")));
/*
* (C) Copyright 2008
* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
* This work has been supported by: QTechnology http://qtec.com/
* based on xparameters-ml507.h by Xilinx
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef XPARAMETER_H
#define XPARAMETER_H
#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000
#define XPAR_IIC_EEPROM_BASEADDR 0x81600000
#define XPAR_INTC_0_BASEADDR 0x81800000
#define XPAR_UARTLITE_0_BASEADDR 0x84000000
#define XPAR_FLASH_MEM0_BASEADDR 0xFE000000
#define XPAR_PLB_CLOCK_FREQ_HZ 100000000
#define XPAR_CORE_CLOCK_FREQ_HZ 400000000
#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13
#define XPAR_UARTLITE_0_BAUDRATE 9600
#endif
......@@ -60,8 +60,6 @@
"SDRAM_" #mnemonic, SDRAM_##mnemonic, data); \
} while (0)
static inline void ppc4xx_ibm_ddr2_register_dump(void);
#if defined(CONFIG_SPD_EEPROM)
/*-----------------------------------------------------------------------------+
......@@ -260,62 +258,19 @@ static void program_ecc_addr(unsigned long start_address,
unsigned long num_bytes,
unsigned long tlb_word2_i_value);
#endif
#if !defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION)
static void program_DQS_calibration(unsigned long *dimm_populated,
unsigned char *iic0_dimm_addr,
unsigned long num_dimm_banks);
unsigned char *iic0_dimm_addr,
unsigned long num_dimm_banks);
#ifdef HARD_CODED_DQS /* calibration test with hardvalues */
static void test(void);
#else
static void DQS_calibration_process(void);
#endif
#endif
int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
void dcbz_area(u32 start_address, u32 num_bytes);
static u32 mfdcr_any(u32 dcr)
{
u32 val;
switch (dcr) {
case SDRAM_R0BAS + 0:
val = mfdcr(SDRAM_R0BAS + 0);
break;
case SDRAM_R0BAS + 1:
val = mfdcr(SDRAM_R0BAS + 1);
break;
case SDRAM_R0BAS + 2:
val = mfdcr(SDRAM_R0BAS + 2);
break;
case SDRAM_R0BAS + 3:
val = mfdcr(SDRAM_R0BAS + 3);
break;
default:
printf("DCR %d not defined in case statement!!!\n", dcr);
val = 0; /* just to satisfy the compiler */
}
return val;
}
static void mtdcr_any(u32 dcr, u32 val)
{
switch (dcr) {
case SDRAM_R0BAS + 0:
mtdcr(SDRAM_R0BAS + 0, val);
break;
case SDRAM_R0BAS + 1:
mtdcr(SDRAM_R0BAS + 1, val);
break;
case SDRAM_R0BAS + 2:
mtdcr(SDRAM_R0BAS + 2, val);
break;
case SDRAM_R0BAS + 3:
mtdcr(SDRAM_R0BAS + 3, val);
break;
default:
printf("DCR %d not defined in case statement!!!\n", dcr);
}
}
static unsigned char spd_read(uchar chip, uint addr)
{
unsigned char data[2];
......@@ -609,7 +564,11 @@ phys_size_t initdram(int board_type)
/*------------------------------------------------------------------
* DQS calibration.
*-----------------------------------------------------------------*/
#if defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION)
DQS_autocalibration();
#else
program_DQS_calibration(dimm_populated, iic0_dimm_addr, num_dimm_banks);
#endif
#ifdef CONFIG_DDR_ECC
/*------------------------------------------------------------------
......@@ -2329,18 +2288,6 @@ static unsigned long is_ecc_enabled(void)
return ecc;
}
static void blank_string(int size)
{
int i;
for (i=0; i<size; i++)
putc('\b');
for (i=0; i<size; i++)
putc(' ');
for (i=0; i<size; i++)
putc('\b');
}
#ifdef CONFIG_DDR_ECC
/*-----------------------------------------------------------------------------+
* program_ecc.
......@@ -2468,6 +2415,7 @@ static void program_ecc_addr(unsigned long start_address,
}
#endif
#if !defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION)
/*-----------------------------------------------------------------------------+
* program_DQS_calibration.
*-----------------------------------------------------------------------------*/
......@@ -3001,7 +2949,8 @@ static void test(void)
(ppcMfdcr_sdram(SDRAM_MCOPT1) & ~SDRAM_MCOPT1_MCHK_MASK)
| ecc_temp);
}
#endif
#endif /* !HARD_CODED_DQS */
#endif /* !defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION) */
#else /* CONFIG_SPD_EEPROM */
......@@ -3104,9 +3053,12 @@ phys_size_t initdram(int board_type)
/* Set Delay Control Registers */
mtsdram(SDRAM_DLCR, CFG_SDRAM0_DLCR);
#if !defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION)
mtsdram(SDRAM_RDCC, CFG_SDRAM0_RDCC);
mtsdram(SDRAM_RQDC, CFG_SDRAM0_RQDC);
mtsdram(SDRAM_RFDC, CFG_SDRAM0_RFDC);
#endif /* !CONFIG_PPC4xx_DDR_AUTOCALIBRATION */
/*
* Enable Controller by SDRAM0_MCOPT2[DCEN] = 1:
......@@ -3115,18 +3067,98 @@ phys_size_t initdram(int board_type)
mfsdram(SDRAM_MCOPT2, val);
mtsdram(SDRAM_MCOPT2, val | SDRAM_MCOPT2_DCEN_ENABLE);
#if defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION)
#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
/*------------------------------------------------------------------
| DQS calibration.
+-----------------------------------------------------------------*/
DQS_autocalibration();
#endif /* !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) */