Commit afbf8899 authored by John Rigby's avatar John Rigby Committed by Albert ARIBAUD
Browse files

armv7: Add support for ST-Ericsson U8500 href platform



Minimal platform support to boot linux from SD.

Supported devices/hw limited to external MMC/SD slot,
GPIO, I2C and minimal PRCMU.
Signed-off-by: default avatarJohn Rigby <john.rigby@linaro.org>
CC: Albert Aribaud <albert.aribaud@free.fr>
parent d3d6427a
#
# Copyright (C) ST-Ericsson SA 2009
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
CFLAGS += -D__RELEASE -D__STN_8500
LIB = $(obj)lib$(BOARD).o
COBJS := u8500_href.o gpio.o prcmu.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
/*
* Copyright (C) ST-Ericsson SA 2009
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/arch/gpio.h>
static struct gpio_register *addr_gpio_register[] = {
(void *)U8500_GPIO_0_BASE,
(void *)U8500_GPIO_1_BASE,
(void *)U8500_GPIO_2_BASE,
(void *)U8500_GPIO_3_BASE,
(void *)U8500_GPIO_4_BASE,
(void *)U8500_GPIO_5_BASE,
(void *)U8500_GPIO_6_BASE,
(void *)U8500_GPIO_7_BASE,
(void *)U8500_GPIO_8_BASE,
};
struct gpio_altfun_data altfun_table[] = {
{
.altfun = GPIO_ALT_I2C_0,
.start = 147,
.end = 148,
.cont = 0,
.type = GPIO_ALTF_A,
},
{
.altfun = GPIO_ALT_I2C_1,
.start = 16,
.end = 17,
.cont = 0,
.type = GPIO_ALTF_B,
},
{
.altfun = GPIO_ALT_I2C_2,
.start = 10,
.end = 11,
.cont = 0,
.type = GPIO_ALTF_B,
},
{
.altfun = GPIO_ALT_I2C_3,
.start = 229,
.end = 230,
.cont = 0,
.type = GPIO_ALTF_C,
},
{
.altfun = GPIO_ALT_UART_0_MODEM,
.start = 0,
.end = 3,
.cont = 1,
.type = GPIO_ALTF_A,
},
{
.altfun = GPIO_ALT_UART_0_MODEM,
.start = 33,
.end = 36,
.cont = 0,
.type = GPIO_ALTF_C,
},
{
.altfun = GPIO_ALT_UART_1,
.start = 4,
.end = 7,
.cont = 0,
.type =
GPIO_ALTF_A,
},
{
.altfun = GPIO_ALT_UART_2,
.start = 18,
.end = 19,
.cont = 1,
.type = GPIO_ALTF_B,
},
{
.altfun = GPIO_ALT_UART_2,
.start = 29,
.end = 32,
.cont = 0,
.type = GPIO_ALTF_C,
},
{
.altfun = GPIO_ALT_MSP_0,
.start = 12,
.end = 17,
.cont = 1,
.type = GPIO_ALTF_A,
},
{
.altfun = GPIO_ALT_MSP_0,
.start = 21,
.end = 21,
.cont = 0,
.type = GPIO_ALTF_B,
},
{
.altfun = GPIO_ALT_MSP_1,
.start = 33,
.end = 36,
.cont = 0,
.type = GPIO_ALTF_A,
},
{
.altfun = GPIO_ALT_MSP_2,
.start = 192,
.end = 196,
.cont = 0,
.type = GPIO_ALTF_A,
},
{
.altfun = GPIO_ALT_LCD_PANEL,
.start = 64,
.end = 93,
.cont = 1,
.type = GPIO_ALTF_A,
},
{
.altfun = GPIO_ALT_LCD_PANEL,
.start = 150,
.end = 171,
.cont = 0,
.type = GPIO_ALTF_B,
},
{
.altfun = GPIO_ALT_SD_CARD0,
.start = 18,
.end = 28,
.cont = 0,
.type = GPIO_ALTF_A,
},
{
.altfun = GPIO_ALT_MM_CARD0,
.start = 18,
.end = 32,
.cont = 0,
.type = GPIO_ALTF_A,
},
{
.altfun = GPIO_ALT_USB_OTG,
.start = 256,
.end = 267,
.cont = 0,
.type = GPIO_ALTF_A,
},
{
.altfun = GPIO_ALT_EMMC,
.start = 197,
.end = 207,
.cont = 0,
.type = GPIO_ALTF_A,
},
{
.altfun = GPIO_ALT_POP_EMMC,
.start = 128,
.end = 138,
.cont = 0,
.type = GPIO_ALTF_A,
},
};
/*
* Static Function declarations
*/
enum gpio_error gpio_setpinconfig(int pin_id, struct gpio_config *config)
{
struct gpio_register *p_gpio_register =
addr_gpio_register[GPIO_BLOCK(pin_id)];
u32 mask = 1UL << (pin_id % GPIO_PINS_PER_BLOCK);
enum gpio_error error = GPIO_OK;
u32 temp_reg;
switch (config->mode) {
case GPIO_ALTF_A:
temp_reg = readl(&p_gpio_register->gpio_afsa);
temp_reg |= mask;
writel(temp_reg, &p_gpio_register->gpio_afsa);
temp_reg = readl(&p_gpio_register->gpio_afsb);
temp_reg &= ~mask;
writel(temp_reg, &p_gpio_register->gpio_afsb);
break;
case GPIO_ALTF_B:
temp_reg = readl(&p_gpio_register->gpio_afsa);
temp_reg &= ~mask;
writel(temp_reg, &p_gpio_register->gpio_afsa);
temp_reg = readl(&p_gpio_register->gpio_afsb);
temp_reg |= mask;
writel(temp_reg, &p_gpio_register->gpio_afsb);
break;
case GPIO_ALTF_C:
temp_reg = readl(&p_gpio_register->gpio_afsa);
temp_reg |= mask;
writel(temp_reg, &p_gpio_register->gpio_afsa);
temp_reg = readl(&p_gpio_register->gpio_afsb);
temp_reg |= mask;
writel(temp_reg, &p_gpio_register->gpio_afsb);
break;
case GPIO_MODE_SOFTWARE:
temp_reg = readl(&p_gpio_register->gpio_afsa);
temp_reg &= ~mask;
writel(temp_reg, &p_gpio_register->gpio_afsa);
temp_reg = readl(&p_gpio_register->gpio_afsb);
temp_reg &= ~mask;
writel(temp_reg, &p_gpio_register->gpio_afsb);
switch (config->direction) {
case GPIO_DIR_INPUT:
writel(mask, &p_gpio_register->gpio_dirc);
break;
case GPIO_DIR_OUTPUT:
writel(mask, &p_gpio_register->gpio_dirs);
break;
case GPIO_DIR_LEAVE_UNCHANGED:
break;
default:
return GPIO_INVALID_PARAMETER;
}
break;
case GPIO_MODE_LEAVE_UNCHANGED:
break;
default:
return GPIO_INVALID_PARAMETER;
}
return error;
}
enum gpio_error gpio_resetgpiopin(int pin_id, char *dev_name)
{
struct gpio_register *p_gpio_register =
addr_gpio_register[GPIO_BLOCK(pin_id)];
u32 mask = 1UL << (pin_id % GPIO_PINS_PER_BLOCK);
enum gpio_error error = GPIO_OK;
u32 temp_reg;
temp_reg = readl(&p_gpio_register->gpio_afsa);
temp_reg &= ~mask;
writel(temp_reg, &p_gpio_register->gpio_afsa);
temp_reg = readl(&p_gpio_register->gpio_afsb);
temp_reg &= ~mask;
writel(temp_reg, &p_gpio_register->gpio_afsb);
writel(mask, &p_gpio_register->gpio_dirc);
return error;
}
struct gpio_config altfun_pinconfig;
enum gpio_error gpio_altfunction(enum gpio_alt_function alt_func,
int which_altfunc, char *dev_name)
{
int i, j, start, end;
enum gpio_error error = -1;
for (i = 0; i < ARRAY_SIZE(altfun_table); i++) {
if (altfun_table[i].altfun != alt_func)
continue;
start = altfun_table[i].start;
end = altfun_table[i].end;
for (j = start; j <= end; j++) {
if (which_altfunc == GPIO_ALTF_FIND)
altfun_pinconfig.mode = altfun_table[i].type;
else
altfun_pinconfig.mode = which_altfunc;
altfun_pinconfig.direction = GPIO_DIR_OUTPUT;
altfun_pinconfig.dev_name = dev_name;
if (which_altfunc != GPIO_ALTF_DISABLE)
error = gpio_setpinconfig(j, &altfun_pinconfig);
else
error = gpio_resetgpiopin(j, dev_name);
if (!error)
continue;
printf("GPIO %d configuration failure (nmdk_error:%d)",
j, error);
error = GPIO_INVALID_PARAMETER;
return error;
}
if (!altfun_table[i].cont)
break;
}
return error;
}
int gpio_writepin(int pin_id, enum gpio_data value, char *dev_name)
{
struct gpio_register *p_gpio_register =
addr_gpio_register[GPIO_BLOCK(pin_id)];
u32 mask = 1UL << (pin_id % GPIO_PINS_PER_BLOCK);
switch (value) {
case GPIO_DATA_HIGH:
writel(mask, &p_gpio_register->gpio_dats);
break;
case GPIO_DATA_LOW:
writel(mask, &p_gpio_register->gpio_datc);
break;
default:
printf("Invalid value passed in %s", __FUNCTION__);
return GPIO_INVALID_PARAMETER;
}
return GPIO_OK;
}
int gpio_readpin(int pin_id, enum gpio_data *rv)
{
struct gpio_register *p_gpio_register =
addr_gpio_register[GPIO_BLOCK(pin_id)];
u32 mask = 1UL << (pin_id % GPIO_PINS_PER_BLOCK);
if ((readl(&p_gpio_register->gpio_dat) & mask) != 0)
*rv = GPIO_DATA_HIGH;
else
*rv = GPIO_DATA_LOW;
return GPIO_OK;
}
int gpio_altfuncenable(enum gpio_alt_function altfunc, char *dev_name)
{
return (int)gpio_altfunction(altfunc, GPIO_ALTF_FIND, dev_name);
}
int gpio_altfuncdisable(enum gpio_alt_function altfunc, char *dev_name)
{
return (int)gpio_altfunction(altfunc, GPIO_ALTF_DISABLE, dev_name);
}
/*
* Copyright (C) 2009 ST-Ericsson SA
*
* Copied from the Linux version:
* Author: Kumar Sanghvi <kumar.sanghvi@stericsson.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __MACH_PRCMU_FW_V1_H
#define __MACH_PRCMU_FW_V1_H
#define AP_EXECUTE 2
#define I2CREAD 1
#define I2C_WR_OK 1
#define I2C_RD_OK 2
#define I2CWRITE 0
#define _PRCMU_TCDM_BASE U8500_PRCMU_TCDM_BASE
#define PRCM_XP70_CUR_PWR_STATE (_PRCMU_TCDM_BASE + 0xFFC) /* 4 BYTES */
#define PRCM_REQ_MB5 (_PRCMU_TCDM_BASE + 0xE44) /* 4 bytes */
#define PRCM_ACK_MB5 (_PRCMU_TCDM_BASE + 0xDF4) /* 4 bytes */
/* Mailbox 5 Requests */
#define PRCM_REQ_MB5_I2COPTYPE_REG (PRCM_REQ_MB5 + 0x0)
#define PRCM_REQ_MB5_BIT_FIELDS (PRCM_REQ_MB5 + 0x1)
#define PRCM_REQ_MB5_I2CSLAVE (PRCM_REQ_MB5 + 0x2)
#define PRCM_REQ_MB5_I2CVAL (PRCM_REQ_MB5 + 0x3)
/* Mailbox 5 ACKs */
#define PRCM_ACK_MB5_STATUS (PRCM_ACK_MB5 + 0x1)
#define PRCM_ACK_MB5_SLAVE (PRCM_ACK_MB5 + 0x2)
#define PRCM_ACK_MB5_VAL (PRCM_ACK_MB5 + 0x3)
#define LOW_POWER_WAKEUP 1
#define EXE_WAKEUP 0
#define REQ_MB5 5
extern int prcmu_i2c_read(u8 reg, u16 slave);
extern int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data);
#endif /* __MACH_PRCMU_FW_V1_H */
/*
* Copyright (C) 2009 ST-Ericsson SA
*
* Adapted from the Linux version:
* Author: Kumar Sanghvi <kumar.sanghvi@stericsson.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*/
/*
* NOTE: This currently does not support the I2C workaround access method.
*/
#include <common.h>
#include <config.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/types.h>
#include <asm/io.h>
#include <asm/errno.h>
#include "prcmu-fw.h"
/* CPU mailbox registers */
#define PRCM_MBOX_CPU_VAL (U8500_PRCMU_BASE + 0x0fc)
#define PRCM_MBOX_CPU_SET (U8500_PRCMU_BASE + 0x100)
#define PRCM_MBOX_CPU_CLR (U8500_PRCMU_BASE + 0x104)
static int prcmu_is_ready(void)
{
int ready = readb(PRCM_XP70_CUR_PWR_STATE) == AP_EXECUTE;
if (!ready)
printf("PRCMU firmware not ready\n");
return ready;
}
static int _wait_for_req_complete(int num)
{
int timeout = 1000;
/* checking any already on-going transaction */
while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout--)
;
timeout = 1000;
/* Set an interrupt to XP70 */
writel(1 << num, PRCM_MBOX_CPU_SET);
while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout--)
;
if (!timeout) {
printf("PRCMU operation timed out\n");
return -1;
}
return 0;
}
/**
* prcmu_i2c_read - PRCMU - 4500 communication using PRCMU I2C
* @reg: - db8500 register bank to be accessed
* @slave: - db8500 register to be accessed
* Returns: ACK_MB5 value containing the status
*/
int prcmu_i2c_read(u8 reg, u16 slave)
{
uint8_t i2c_status;
uint8_t i2c_val;
if (!prcmu_is_ready())
return -1;
debug("\nprcmu_4500_i2c_read:bank=%x;reg=%x;\n",
reg, slave);
/* prepare the data for mailbox 5 */
writeb((reg << 1) | I2CREAD, PRCM_REQ_MB5_I2COPTYPE_REG);
writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS);
writeb(slave, PRCM_REQ_MB5_I2CSLAVE);
writeb(0, PRCM_REQ_MB5_I2CVAL);
_wait_for_req_complete(REQ_MB5);
/* retrieve values */
debug("ack-mb5:transfer status = %x\n",
readb(PRCM_ACK_MB5_STATUS));
debug("ack-mb5:reg bank = %x\n", readb(PRCM_ACK_MB5) >> 1);
debug("ack-mb5:slave_add = %x\n",
readb(PRCM_ACK_MB5_SLAVE));
debug("ack-mb5:reg_val = %d\n", readb(PRCM_ACK_MB5_VAL));
i2c_status = readb(PRCM_ACK_MB5_STATUS);
i2c_val = readb(PRCM_ACK_MB5_VAL);
if (i2c_status == I2C_RD_OK)
return i2c_val;
else {
printf("prcmu_i2c_read:read return status= %d\n",
i2c_status);
return -1;
}
}
/**
* prcmu_i2c_write - PRCMU-db8500 communication using PRCMU I2C
* @reg: - db8500 register bank to be accessed
* @slave: - db800 register to be written to
* @reg_data: - the data to write
* Returns: ACK_MB5 value containing the status
*/
int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data)
{
uint8_t i2c_status;
if (!prcmu_is_ready())
return -1;
debug("\nprcmu_4500_i2c_write:bank=%x;reg=%x;\n",
reg, slave);
/* prepare the data for mailbox 5 */
writeb((reg << 1) | I2CWRITE, PRCM_REQ_MB5_I2COPTYPE_REG);
writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS);
writeb(slave, PRCM_REQ_MB5_I2CSLAVE);
writeb(reg_data, PRCM_REQ_MB5_I2CVAL);
debug("\ncpu_is_u8500v11\n");
_wait_for_req_complete(REQ_MB5);
/* retrieve values */
debug("ack-mb5:transfer status = %x\n",
readb(PRCM_ACK_MB5_STATUS));
debug("ack-mb5:reg bank = %x\n", readb(PRCM_ACK_MB5) >> 1);
debug("ack-mb5:slave_add = %x\n",
readb(PRCM_ACK_MB5_SLAVE));
debug("ack-mb5:reg_val = %d\n", readb(PRCM_ACK_MB5_VAL));
i2c_status = readb(PRCM_ACK_MB5_STATUS);
debug("\ni2c_status = %x\n", i2c_status);
if (i2c_status == I2C_WR_OK)
return 0;
else {
printf("ape-i2c: i2c_status : 0x%x\n", i2c_status);
return -1;
}
}