Commit affd4a9f authored by Simon Glass's avatar Simon Glass
Browse files

rockchip: Tidy up the register-access macros

These work reasonable well, but there are a few errors:

- Brackets should be used to avoid unexpected side-effects
- When setting bits, the corresponding upper 16 bits should be set also
Signed-off-by: default avatarSimon Glass <>
parent 2460d18c
......@@ -7,14 +7,15 @@
#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | set)
#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | (set))
#define RK_SETBITS(set) RK_CLRSETBITS(0, set)
#define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0)
#define TIMER7_BASE 0xff810020
#define rk_clrsetreg(addr, clr, set) writel((clr) << 16 | (set), addr)
#define rk_clrsetreg(addr, clr, set) \
writel(((clr) | (set)) << 16 | (set), addr)
#define rk_clrreg(addr, clr) writel((clr) << 16, addr)
#define rk_setreg(addr, set) writel(set, addr)
#define rk_setreg(addr, set) writel((set) << 16 | (set), addr)
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment