Commit ba8e76bd authored by Timur Tabi's avatar Timur Tabi Committed by Anatolij Gustschin
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powerpc: use 'video-mode' environment variable to configure DIU



Use the 'video-mode' environment variable (for Freescale chips that have a
DIU display controller) to designate the full video configuration.  Previously,
the DIU driver used the 'monitor' variable, and it was used only to determine
the output video port.

The old definition of the "monitor" environment variable only determines
which video port to use for output.  This variable was set to a number (0,
1, or sometimes 2) to specify a DVI, LVDS, or Dual-LVDS port.  The
resolution was hard-coded into board-specific code.  The Linux command-line
arguments needed to be hard-coded to the proper video definition string.
Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
Signed-off-by: default avatarAnatolij Gustschin <agust@denx.de>
parent a5dbdc81
......@@ -1096,13 +1096,10 @@ The following options need to be configured:
CONFIG_VIDEO_LOGO
CONFIG_VIDEO_BMP_LOGO
The DIU driver will look for the 'monitor' environment variable,
and if defined, enable the DIU as a console during boot. This
variable should be set to one of these values:
'0' Output video to the DVI connector
'1' Output video to the LVDS connector
'2' Output video to the Dual-Link LVDS connector
The DIU driver will look for the 'video-mode' environment
variable, and if defined, enable the DIU as a console during
boot. See the documentation file README.video for a
description of this variable.
- Keyboard Support:
CONFIG_KEYBOARD
......
......@@ -51,20 +51,10 @@ void diu_set_pixel_clock(unsigned int pixclock)
debug("DIU: Modified value of CLKDVDR = 0x%08x\n", in_be32(clkdvdr));
}
int platform_diu_init(unsigned int *xres, unsigned int *yres)
int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
{
unsigned int pixel_format;
#if defined(CONFIG_VIDEO_XRES) & defined(CONFIG_VIDEO_YRES)
*xres = CONFIG_VIDEO_XRES;
*yres = CONFIG_VIDEO_YRES;
#else
*xres = 1024;
*yres = 768;
#endif
pixel_format = 0x88883316;
unsigned int pixel_format = 0x88883316;
debug("mpc5121_diu_init\n");
return fsl_diu_init(*xres, pixel_format, 0);
return fsl_diu_init(xres, pixel_format, 0);
}
/*
* Copyright 2007 Freescale Semiconductor, Inc.
* York Sun <yorksun@freescale.com>
* Copyright 2007-2011 Freescale Semiconductor, Inc.
* Authors: York Sun <yorksun@freescale.com>
* Timur Tabi <timur@freescale.com>
*
* FSL DIU Framebuffer driver
*
......@@ -27,6 +28,10 @@
#include <command.h>
#include <asm/io.h>
#include <fsl_diu_fb.h>
#include "../common/pixis.h"
#define PX_BRDCFG0_DLINK 0x10
#define PX_BRDCFG0_DVISEL 0x08
void diu_set_pixel_clock(unsigned int pixclock)
{
......@@ -49,50 +54,34 @@ void diu_set_pixel_clock(unsigned int pixclock)
debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
}
int platform_diu_init(unsigned int *xres, unsigned int *yres)
int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
{
char *monitor_port;
int gamma_fix;
unsigned int pixel_format;
unsigned char tmp_val;
unsigned char pixis_arch;
u8 *pixis_base = (u8 *)PIXIS_BASE;
tmp_val = in_8(pixis_base + PIXIS_BRDCFG0);
pixis_arch = in_8(pixis_base + PIXIS_VER);
monitor_port = getenv("monitor");
if (!strncmp(monitor_port, "0", 1)) { /* 0 - DVI */
*xres = 1280;
*yres = 1024;
if (pixis_arch == 0x01)
pixel_format = 0x88882317;
else
pixel_format = 0x88883316;
gamma_fix = 0;
out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x08);
const char *name;
int gamma_fix = 0;
u32 pixel_format = 0x88883316;
u8 temp;
} else if (!strncmp(monitor_port, "1", 1)) { /* 1 - Single link LVDS */
*xres = 1024;
*yres = 768;
pixel_format = 0x88883316;
gamma_fix = 0;
out_8(pixis_base + PIXIS_BRDCFG0, (tmp_val & 0xf7) | 0x10);
temp = in_8(&pixis->brdcfg0);
} else if (!strncmp(monitor_port, "2", 1)) { /* 2 - Double link LVDS */
*xres = 1280;
*yres = 1024;
pixel_format = 0x88883316;
if (strncmp(port, "dlvds", 5) == 0) {
/* Dual link LVDS */
gamma_fix = 1;
out_8(pixis_base + PIXIS_BRDCFG0, tmp_val & 0xe7);
} else { /* DVI */
*xres = 1280;
*yres = 1024;
pixel_format = 0x88882317;
gamma_fix = 0;
out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x08);
temp &= ~(PX_BRDCFG0_DLINK | PX_BRDCFG0_DVISEL);
name = "Dual-Link LVDS";
} else if (strncmp(port, "lvds", 4) == 0) {
/* Single link LVDS */
temp = (temp & ~PX_BRDCFG0_DVISEL) | PX_BRDCFG0_DLINK;
name = "Single-Link LVDS";
} else {
/* DVI */
if (in_8(&pixis->ver) == 1) /* Board version */
pixel_format = 0x88882317;
temp |= PX_BRDCFG0_DVISEL;
name = "DVI";
}
return fsl_diu_init(*xres, pixel_format, gamma_fix);
printf("DIU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
out_8(&pixis->brdcfg0, temp);
return fsl_diu_init(xres, pixel_format, gamma_fix);
}
......@@ -12,6 +12,7 @@
#include <common.h>
#include <command.h>
#include <linux/ctype.h>
#include <asm/io.h>
#include <stdio_dev.h>
#include <video_fb.h>
......@@ -81,10 +82,10 @@ void diu_set_pixel_clock(unsigned int pixclock)
out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16));
}
int platform_diu_init(unsigned int *xres, unsigned int *yres)
int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
char *monitor_port;
const char *name;
u32 pixel_format;
u8 temp;
......@@ -100,21 +101,23 @@ int platform_diu_init(unsigned int *xres, unsigned int *yres)
temp = in_8(&pixis->brdcfg1);
monitor_port = getenv("monitor");
if (!strncmp(monitor_port, "1", 1)) { /* 1 - Single link LVDS */
*xres = 1024;
*yres = 768;
/* Enable the DFP port, disable the DVI and the backlight */
temp &= ~(PX_BRDCFG1_DVIEN | PX_BRDCFG1_BACKLIGHT);
temp |= PX_BRDCFG1_DFPEN;
if (strncmp(port, "lvds", 4) == 0) {
/* Single link LVDS */
temp &= ~PX_BRDCFG1_DVIEN;
/*
* LVDS also needs backlight enabled, otherwise the display
* will be blank.
*/
temp |= (PX_BRDCFG1_DFPEN | PX_BRDCFG1_BACKLIGHT);
name = "Single-Link LVDS";
} else { /* DVI */
*xres = 1280;
*yres = 1024;
/* Enable the DVI port, disable the DFP and the backlight */
temp &= ~(PX_BRDCFG1_DFPEN | PX_BRDCFG1_BACKLIGHT);
temp |= PX_BRDCFG1_DVIEN;
name = "DVI";
}
printf("DIU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
out_8(&pixis->brdcfg1, temp);
/*
......@@ -136,7 +139,7 @@ int platform_diu_init(unsigned int *xres, unsigned int *yres)
clrsetbits_be32(&gur->pmuxcr, PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_DIU);
pmuxcr = in_be32(&gur->pmuxcr);
return fsl_diu_init(*xres, pixel_format, 0);
return fsl_diu_init(xres, pixel_format, 0);
}
/*
......
......@@ -28,7 +28,7 @@ LIB := $(obj)libvideo.o
COBJS-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o
COBJS-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
COBJS-$(CONFIG_CFB_CONSOLE) += cfb_console.o
COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o
COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
COBJS-$(CONFIG_S6E63D6) += s6e63d6.o
COBJS-$(CONFIG_VIDEO_AMBA) += amba.o
COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
......
/*
* Copyright 2007, 2010 Freescale Semiconductor, Inc.
* York Sun <yorksun@freescale.com>
* Copyright 2007, 2010-2011 Freescale Semiconductor, Inc.
* Authors: York Sun <yorksun@freescale.com>
* Timur Tabi <timur@freescale.com>
*
* FSL DIU Framebuffer driver
*
......@@ -24,12 +25,42 @@
*/
#include <common.h>
#include <i2c.h>
#include <malloc.h>
#include <asm/io.h>
#include "videomodes.h"
#include <video_fb.h>
#include <fsl_diu_fb.h>
struct fb_var_screeninfo {
unsigned int xres; /* visible resolution */
unsigned int yres;
unsigned int bits_per_pixel; /* guess what */
/* Timing: All values in pixclocks, except pixclock (of course) */
unsigned int pixclock; /* pixel clock in ps (pico seconds) */
unsigned int left_margin; /* time from sync to picture */
unsigned int right_margin; /* time from picture to sync */
unsigned int upper_margin; /* time from sync to picture */
unsigned int lower_margin;
unsigned int hsync_len; /* length of horizontal sync */
unsigned int vsync_len; /* length of vertical sync */
unsigned int sync; /* see FB_SYNC_* */
unsigned int vmode; /* see FB_VMODE_* */
unsigned int rotate; /* angle we rotate counter clockwise */
};
struct fb_info {
struct fb_var_screeninfo var; /* Current var */
unsigned int smem_len; /* Length of frame buffer mem */
unsigned int type; /* see FB_TYPE_* */
unsigned int line_length; /* length of a line in bytes */
void *screen_base;
unsigned long screen_size;
};
struct fb_videomode {
const char *name; /* optional */
unsigned int refresh; /* optional */
......@@ -53,6 +84,7 @@ struct fb_videomode {
/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
static struct fb_videomode fsl_diu_mode_800 = {
.name = "800x600-60",
.refresh = 60,
.xres = 800,
.yres = 480,
......@@ -74,6 +106,7 @@ static struct fb_videomode fsl_diu_mode_800 = {
* hsync 31.5kHz, vsync 60Hz
*/
static struct fb_videomode fsl_diu_mode_1024 = {
.name = "1024x768-60",
.refresh = 60,
.xres = 1024,
.yres = 768,
......@@ -109,120 +142,137 @@ static struct fb_videomode fsl_diu_mode_1280 = {
*/
struct diu_ad {
/* Word 0(32-bit) in DDR memory */
unsigned int pix_fmt; /* hard coding pixel format */
__le32 pix_fmt; /* hard coding pixel format */
/* Word 1(32-bit) in DDR memory */
unsigned int addr;
__le32 addr;
/* Word 2(32-bit) in DDR memory */
unsigned int src_size_g_alpha;
__le32 src_size_g_alpha;
/* Word 3(32-bit) in DDR memory */
unsigned int aoi_size;
__le32 aoi_size;
/* Word 4(32-bit) in DDR memory */
unsigned int offset_xyi;
__le32 offset_xyi;
/* Word 5(32-bit) in DDR memory */
unsigned int offset_xyd;
__le32 offset_xyd;
/* Word 6(32-bit) in DDR memory */
unsigned int ckmax_r:8;
unsigned int ckmax_g:8;
unsigned int ckmax_b:8;
unsigned int res9:8;
__le32 ckmax_r:8;
__le32 ckmax_g:8;
__le32 ckmax_b:8;
__le32 res9:8;
/* Word 7(32-bit) in DDR memory */
unsigned int ckmin_r:8;
unsigned int ckmin_g:8;
unsigned int ckmin_b:8;
unsigned int res10:8;
__le32 ckmin_r:8;
__le32 ckmin_g:8;
__le32 ckmin_b:8;
__le32 res10:8;
/* Word 8(32-bit) in DDR memory */
unsigned int next_ad;
__le32 next_ad;
/* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
unsigned int res1;
unsigned int res2;
unsigned int res3;
}__attribute__ ((packed));
__le32 res[3];
} __attribute__ ((packed));
/*
* DIU register map
*/
struct diu {
unsigned int desc[3];
unsigned int gamma;
unsigned int pallete;
unsigned int cursor;
unsigned int curs_pos;
unsigned int diu_mode;
unsigned int bgnd;
unsigned int bgnd_wb;
unsigned int disp_size;
unsigned int wb_size;
unsigned int wb_mem_addr;
unsigned int hsyn_para;
unsigned int vsyn_para;
unsigned int syn_pol;
unsigned int thresholds;
unsigned int int_status;
unsigned int int_mask;
unsigned int colorbar[8];
unsigned int filling;
unsigned int plut;
__be32 desc[3];
__be32 gamma;
__be32 pallete;
__be32 cursor;
__be32 curs_pos;
__be32 diu_mode;
__be32 bgnd;
__be32 bgnd_wb;
__be32 disp_size;
__be32 wb_size;
__be32 wb_mem_addr;
__be32 hsyn_para;
__be32 vsyn_para;
__be32 syn_pol;
__be32 thresholds;
__be32 int_status;
__be32 int_mask;
__be32 colorbar[8];
__be32 filling;
__be32 plut;
} __attribute__ ((packed));
struct diu_hw {
struct diu *diu_reg;
volatile unsigned int mode; /* DIU operation mode */
};
struct diu_addr {
unsigned char * paddr; /* Virtual address */
unsigned int offset;
void *vaddr; /* Virtual address */
u32 paddr; /* 32-bit physical address */
unsigned int offset; /* Alignment offset */
};
static struct fb_info info;
/*
* Modes of operation of DIU
* Align to 64-bit(8-byte), 32-byte, etc.
*/
#define MFB_MODE0 0 /* DIU off */
#define MFB_MODE1 1 /* All three planes output to display */
#define MFB_MODE2 2 /* Plane 1 to display,
* planes 2+3 written back to memory */
#define MFB_MODE3 3 /* All three planes written back to memory */
#define MFB_MODE4 4 /* Color bar generation */
#define MAX_CURS 32
static struct fb_info fsl_fb_info;
static struct diu_addr gamma, cursor;
static struct diu_ad fsl_diu_fb_ad __attribute__ ((aligned(32)));
static struct diu_ad dummy_ad __attribute__ ((aligned(32)));
static unsigned char *dummy_fb;
static struct diu_hw dr = {
.mode = MFB_MODE1,
};
static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
{
u32 offset, ssize;
u32 mask;
int fb_enabled = 0;
int fb_initialized = 0;
const int default_xres = 1280;
const int default_pixel_format = 0x88882317;
ssize = size + bytes_align;
buf->vaddr = malloc(ssize);
if (!buf->vaddr)
return -1;
static int map_video_memory(struct fb_info *info, unsigned long bytes_align);
static void enable_lcdc(void);
static void disable_lcdc(void);
static int fsl_diu_enable_panel(struct fb_info *info);
static int fsl_diu_disable_panel(struct fb_info *info);
static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align);
void diu_set_pixel_clock(unsigned int pixclock);
memset(buf->vaddr, 0, ssize);
mask = bytes_align - 1;
offset = (u32)buf->vaddr & mask;
if (offset) {
buf->offset = bytes_align - offset;
buf->vaddr += offset;
} else
buf->offset = 0;
int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix)
buf->paddr = virt_to_phys(buf->vaddr);
return 0;
}
/*
* Allocate a framebuffer and an Area Descriptor that points to it. Both
* are created in the same memory block. The Area Descriptor is updated to
* point to the framebuffer memory. Memory is aligned as needed.
*/
static struct diu_ad *allocate_fb(unsigned int xres, unsigned int yres,
unsigned int depth, void **fb)
{
struct fb_videomode *fsl_diu_mode_db;
struct diu_ad *ad = &fsl_diu_fb_ad;
struct diu *hw;
struct fb_info *info = &fsl_fb_info;
struct fb_var_screeninfo *var = &info->var;
unsigned char *gamma_table_base;
unsigned int i, j;
unsigned long size = xres * yres * depth;
struct diu_addr addr;
struct diu_ad *ad;
size_t ad_size = roundup(sizeof(struct diu_ad), 32);
/*
* Allocate a memory block that holds the Area Descriptor and the
* frame buffer right behind it. To keep the code simple, everything
* is aligned on a 32-byte address.
*/
if (allocate_buf(&addr, ad_size + size, 32) < 0)
return NULL;
debug("Enter fsl_diu_init\n");
dr.diu_reg = (struct diu *) (CONFIG_SYS_DIU_ADDR);
hw = (struct diu *) dr.diu_reg;
ad = addr.vaddr;
ad->addr = cpu_to_le32(addr.paddr + ad_size);
ad->aoi_size = cpu_to_le32((yres << 16) | xres);
ad->src_size_g_alpha = cpu_to_le32((yres << 12) | xres);
ad->offset_xyi = 0;
ad->offset_xyd = 0;
disable_lcdc();
if (fb)
*fb = addr.vaddr + ad_size;
return ad;
}
int fsl_diu_init(int xres, u32 pixel_format, int gamma_fix)
{
struct fb_videomode *fsl_diu_mode_db;
struct diu_ad *ad;
struct diu *hw = (struct diu *)CONFIG_SYS_DIU_ADDR;
u8 *gamma_table_base;
unsigned int i, j;
struct diu_ad *dummy_ad;
struct diu_addr gamma;
struct diu_addr cursor;
switch (xres) {
case 800:
......@@ -235,65 +285,40 @@ int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix)
fsl_diu_mode_db = &fsl_diu_mode_1024;
}
if (0 == fb_initialized) {
allocate_buf(&gamma, 768, 32);
debug("gamma is allocated @ 0x%x\n",
(unsigned int)gamma.paddr);
allocate_buf(&cursor, MAX_CURS * MAX_CURS * 2, 32);
debug("curosr is allocated @ 0x%x\n",
(unsigned int)cursor.paddr);
/* create a dummy fb and dummy ad */
dummy_fb = malloc(64);
if (NULL == dummy_fb) {
printf("Cannot allocate dummy fb\n");
return -1;
}
dummy_ad.addr = cpu_to_le32((unsigned int)dummy_fb);
dummy_ad.pix_fmt = 0x88882317;
dummy_ad.src_size_g_alpha = 0x04400000; /* alpha = 0 */
dummy_ad.aoi_size = 0x02000400;
dummy_ad.offset_xyi = 0;
dummy_ad.offset_xyd = 0;
dummy_ad.next_ad = 0;
/* Memory allocation for framebuffer */
if (map_video_memory(info, 32)) {
printf("Unable to allocate fb memory 1\n");
return -1;
}
/* The AD struct for the dummy framebuffer and the FB itself */
dummy_ad = allocate_fb(2, 4, 4, NULL);
if (!dummy_ad) {
printf("DIU: Out of memory\n");
return -1;
}
memset(info->screen_base, 0, info->smem_len);
out_be32(&dr.diu_reg->desc[0], (int)&dummy_ad);
out_be32(&dr.diu_reg->desc[1], (int)&dummy_ad);
out_be32(&dr.diu_reg->desc[2], (int)&dummy_ad);
debug("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]);
debug("dummy desc[0] = 0x%x\n", hw->desc[0]);
dummy_ad->pix_fmt = 0x88883316;
/* read mode info */
var->xres = fsl_diu_mode_db->xres;
var->yres = fsl_diu_mode_db->yres;
var->bits_per_pixel = 32;
var->pixclock = fsl_diu_mode_db->pixclock;
var->left_margin = fsl_diu_mode_db->left_margin;
var->right_margin = fsl_diu_mode_db->right_margin;
var->upper_margin = fsl_diu_mode_db->upper_margin;
var->lower_margin = fsl_diu_mode_db->lower_margin;
var->hsync_len = fsl_diu_mode_db->hsync_len;
var->vsync_len = fsl_diu_mode_db->vsync_len;
var->sync = fsl_diu_mode_db->sync;
var->vmode = fsl_diu_mode_db->vmode;
info->line_length = var->xres * var->bits_per_pixel / 8;
info.var.xres = fsl_diu_mode_db->xres;
info.var.yres = fsl_diu_mode_db->yres;
info.var.bits_per_pixel = 32;
info.var.pixclock = fsl_diu_mode_db->pixclock;
info.var.left_margin = fsl_diu_mode_db->left_margin;
info.var.right_margin = fsl_diu_mode_db->right_margin;
info.var.upper_margin = fsl_diu_mode_db->upper_margin;
info.var.lower_margin = fsl_diu_mode_db->lower_margin;
info.var.hsync_len = fsl_diu_mode_db->hsync_len;
info.var.vsync_len = fsl_diu_mode_db->vsync_len;
info.var.sync = fsl_diu_mode_db->sync;
info.var.vmode = fsl_diu_mode_db->vmode;
info.line_length = info.var.xres * info.var.bits_per_pixel / 8;
/* Memory allocation for framebuffer */
info.smem_len =
info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8);
ad = allocate_fb(info.var.xres, info.var.yres,
info.var.bits_per_pixel / 8, &info.screen_base);
if (!ad) {
printf("DIU: Out of memory\n");
return -1;
}
ad->pix_fmt = pixel_format;
ad->addr = cpu_to_le32((unsigned int)info->screen_base);
ad->src_size_g_alpha
= cpu_to_le32((var->yres << 12) | var->xres);
/* fix me. AOI should not be greater than display size */
ad->aoi_size = cpu_to_le32(( var->yres << 16) | var->xres);
ad->offset_xyi = 0;
ad->offset_xyd = 0;
/* Disable chroma keying function */
ad->ckmax_r = 0;
......@@ -304,195 +329,91 @@ int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix)
ad->ckmin_g = 255;
ad->ckmin_b = 255;
gamma_table_base = gamma.paddr;
debug("gamma_table_base is allocated @ 0x%x\n",
(unsigned int)gamma_table_base);
/* Prep for DIU init - gamma table */
/* Initialize the gamma table */
if (allocate_buf(&gamma, 256 * 3