Commit be72591b authored by Fabio Estevam's avatar Fabio Estevam Committed by Tom Rini

Kconfig: Move USE_ARCH_MEMCPY/MEMSET to Kconfig

Move USE_ARCH_MEMCPY/MEMSET options to Kconfig.

Make it "default y" for the ARMv7 architecture and make it
depend on !ARM64 && !SPL.
Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
parent 41122d37
......@@ -126,6 +126,24 @@ config ENABLE_ARM_SOC_BOOT0_HOOK
ARM_SOC_BOOT0_HOOK which contains the required assembler
preprocessor code.
config USE_ARCH_MEMCPY
bool "Use an assembly optimized implementation of memcpy"
default y if CPU_V7
depends on !ARM64 && !SPL
help
Enable the generation of an optimized version of memcpy.
Such implementation may be faster under some conditions
but may increase the binary size.
config USE_ARCH_MEMSET
bool "Use an assembly optimized implementation of memset"
default y if CPU_V7
depends on !ARM64 && !SPL
help
Enable the generation of an optimized version of memset.
Such implementation may be faster under some conditions
but may increase the binary size.
config ARCH_OMAP2
bool
select CPU_V7
......
......@@ -28,8 +28,6 @@
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_USE_ARCH_MEMSET
#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_TMU_TIMER
#define CONFIG_SYS_DCACHE_OFF
......
......@@ -16,9 +16,6 @@
#include "rcar-gen2-common.h"
#define CONFIG_USE_ARCH_MEMSET
#define CONFIG_USE_ARCH_MEMCPY
/* STACK */
#define CONFIG_SYS_INIT_SP_ADDR 0xE817FFFC
#define STACK_AREA_SIZE 0xC000
......
......@@ -15,8 +15,6 @@
#include "mx7_common.h"
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_USE_ARCH_MEMSET
/*#define CONFIG_DBG_MONITOR*/
#define PHYS_SDRAM_SIZE SZ_512M
......
......@@ -16,8 +16,6 @@
#define CONFIG_VF610
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_USE_ARCH_MEMSET
#define CONFIG_SYS_FSL_CLK
#define CONFIG_ARCH_MISC_INIT
......
......@@ -20,9 +20,6 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_USE_ARCH_MEMSET
/* Keep L2 Cache Disabled */
/* input clock of PLL: 24MHz input clock */
......
......@@ -35,7 +35,6 @@
#define CONFIG_SYS_NAND_ONFI_DETECTION
#ifdef CONFIG_CMD_NAND
#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
......
......@@ -76,12 +76,6 @@
#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
#ifndef CONFIG_ARM64
#ifndef CONFIG_SPL_BUILD
#define CONFIG_USE_ARCH_MEMCPY
#endif
#endif
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
......
......@@ -63,11 +63,6 @@
/* serial console configuration */
#define CONFIG_BAUDRATE 115200
#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_ARM64)
#define CONFIG_USE_ARCH_MEMSET
#define CONFIG_USE_ARCH_MEMCPY
#endif
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_CMDLINE_EDITING /* add command line history */
......
......@@ -42,7 +42,6 @@
#define CONFIG_SYS_NAND_ONFI_DETECTION
#ifdef CONFIG_CMD_NAND
#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
......
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