Commit be9b56df authored by Kim Phillips's avatar Kim Phillips
Browse files

mpc83xx: CONFIG_83XX_GENERIC_PCI is now synonymous with CONFIG_PCI; remove the former


Signed-off-by: default avatarKim Phillips <kim.phillips@freescale.com>
parent 94978e19
......@@ -38,8 +38,8 @@ COBJS-y += spd_sdram.o
COBJS-y += ecc.o
COBJS-$(CONFIG_QE) += qe_io.o
COBJS-$(CONFIG_FSL_SERDES) += serdes.o
COBJS-$(CONFIG_83XX_GENERIC_PCI) += pci.o
COBJS-$(CONFIG_83XX_GENERIC_PCIE) += pcie.o
COBJS-$(CONFIG_PCI) += pci.o
COBJS-$(CONFIG_PCIE) += pcie.o
COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
COBJS := $(COBJS-y)
......
......@@ -36,7 +36,6 @@
#define CONFIG_MPC8313ERDB 1
#define CONFIG_PCI
#define CONFIG_83XX_GENERIC_PCI
#define CONFIG_MISC_INIT_R
......
......@@ -332,8 +332,7 @@
#define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000
#define CONFIG_PCI
#define CONFIG_83XX_GENERIC_PCI 1 /* Use generic PCI setup */
#define CONFIG_83XX_GENERIC_PCIE 1
#define CONFIG_PCIE
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
......
......@@ -18,7 +18,6 @@
#define CONFIG_MPC832x 1 /* MPC832x CPU specific */
#define CONFIG_PCI 1
#define CONFIG_83XX_GENERIC_PCI 1
/*
* System Clock Setup
......
......@@ -334,7 +334,6 @@
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_83XX_GENERIC_PCI
#define CONFIG_83XX_PCI_STREAMING
#undef CONFIG_EEPRO100
......
......@@ -38,9 +38,6 @@
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */
#undef CONFIG_PCI
#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
#define PCI_66M
#ifdef PCI_66M
#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
......@@ -374,7 +371,6 @@
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_83XX_GENERIC_PCI
#define CONFIG_83XX_PCI_STREAMING
#undef CONFIG_EEPRO100
......
......@@ -382,7 +382,6 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_83XX_GENERIC_PCI
#ifndef CONFIG_PCI_PNP
#define PCI_ENET0_IOADDR 0x00000000
......
......@@ -369,7 +369,6 @@
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_83XX_GENERIC_PCI
#define CONFIG_83XX_PCI_STREAMING
#undef CONFIG_EEPRO100
......
......@@ -277,7 +277,6 @@
* Addresses are mapped 1-1.
*/
#define CONFIG_PCI
#define CONFIG_83XX_GENERIC_PCI 1
#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000
#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
......
......@@ -381,8 +381,7 @@
#ifndef __ASSEMBLY__
extern int board_pci_host_broken(void);
#endif
#define CONFIG_83XX_GENERIC_PCI 1 /* Use generic PCI setup */
#define CONFIG_83XX_GENERIC_PCIE 1
#define CONFIG_PCIE
#define CONFIG_PQ_MDS_PIB 1 /* PQ MDS Platform IO Board */
#define CONFIG_HAS_FSL_DR_USB 1 /* fixup device tree for the DR USB */
......
......@@ -49,8 +49,7 @@
#define CONFIG_83XX_PCICLK 66666667 /* in HZ */
#else
#define CONFIG_83XX_CLKIN 66666667 /* in Hz */
#define CONFIG_83XX_GENERIC_PCI 1
#define CONFIG_83XX_GENERIC_PCIE 1
#define CONFIG_PCIE
#endif
#ifndef CONFIG_SYS_CLK_FREQ
......
......@@ -40,7 +40,6 @@
#define CONFIG_SYS_IMMR 0xE0000000
#define CONFIG_PCI
#define CONFIG_83XX_GENERIC_PCI
#define CONFIG_PCI_SKIP_HOST_BRIDGE
#define CONFIG_HARD_I2C
#define CONFIG_TSEC_ENET
......
......@@ -37,7 +37,6 @@
#define CONFIG_MPC8313 1
#define CONFIG_PCI
#define CONFIG_83XX_GENERIC_PCI
#define CONFIG_MISC_INIT_R
......
......@@ -247,7 +247,6 @@ extern int tqm834x_num_flash_banks;
#if defined(CONFIG_PCI)
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_83XX_GENERIC_PCI
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
/* PCI1 host bridge */
......
......@@ -329,7 +329,6 @@
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_83XX_GENERIC_PCI
#undef CONFIG_EEPRO100
#undef CONFIG_TULIP
......
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