* Some code cleanup

* Patch by Josef Baumgartner, 10 Feb 2004:
  Fixes for Coldfire port

* Patch by Brad Kemp, 11 Feb 2004:
  Fix CFI flash driver problems

CHANGELOG

@@ -2,9 +2,17 @@
 Changes since U-Boot 1.0.1:
 ======================================================================
 
+* Some code cleanup
+
+* Patch by Josef Baumgartner, 10 Feb 2004:
+  Fixes for Coldfire port
+
+* Patch by Brad Kemp, 11 Feb 2004:
+  Fix CFI flash driver problems
+
 * Make sure to use a bus clock divider of 2 only when running TQM8xxM
   modules at CPU clock frequencies above 66 MHz.
-  
+
 * Optimize flash programming speed for LWMON (by another 100% :-)
 
 * Patch by Jian Zhang, 3 Feb 2004:

Makefile

@@ -833,10 +833,10 @@ ZPC1900_config: unconfig
 #########################################################################
 
 M5272C3_config :		unconfig
-	@./mkconfig $(@:_config=) m68k coldfire m5272c3
+	@./mkconfig $(@:_config=) m68k mcf52x2 m5272c3
 
 M5282EVB_config :		unconfig
-	@./mkconfig $(@:_config=) m68k coldfire m5282evb
+	@./mkconfig $(@:_config=) m68k mcf52x2 m5282evb
 
 #########################################################################
 ## MPC85xx Systems

board/bmw/ns16550.c

@@ -9,49 +9,49 @@
 
 typedef struct NS16550 *NS16550_t;
 
-const NS16550_t COM_PORTS[] = { (NS16550_t) ((CFG_EUMB_ADDR) + 0x4500), (NS16550_t) ((CFG_EUMB_ADDR) + 0x4600)};
+const NS16550_t COM_PORTS[] =
+	{ (NS16550_t) ((CFG_EUMB_ADDR) + 0x4500),
+(NS16550_t) ((CFG_EUMB_ADDR) + 0x4600) };
 
-volatile struct NS16550 *
-NS16550_init(int chan, int baud_divisor)
+volatile struct NS16550 *NS16550_init (int chan, int baud_divisor)
 {
- volatile struct NS16550 *com_port;
- com_port = (struct NS16550 *) COM_PORTS[chan];
- com_port->ier = 0x00;
- com_port->lcr = LCR_BKSE;              /* Access baud rate */
- com_port->dll = baud_divisor & 0xff;   /* 9600 baud */
- com_port->dlm = (baud_divisor >> 8) & 0xff;
- com_port->lcr = LCR_8N1;               /* 8 data, 1 stop, no parity */
- com_port->mcr = MCR_RTS;     /* RTS/DTR */
- com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR;                  /* Clear & enable FIFOs */
-return (com_port);
+	volatile struct NS16550 *com_port;
+
+	com_port = (struct NS16550 *) COM_PORTS[chan];
+	com_port->ier = 0x00;
+	com_port->lcr = LCR_BKSE;	/* Access baud rate */
+	com_port->dll = baud_divisor & 0xff;	/* 9600 baud */
+	com_port->dlm = (baud_divisor >> 8) & 0xff;
+	com_port->lcr = LCR_8N1;	/* 8 data, 1 stop, no parity */
+	com_port->mcr = MCR_RTS;	/* RTS/DTR */
+	com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR;	/* Clear & enable FIFOs */
+	return (com_port);
 }
 
-void
-NS16550_reinit(volatile struct NS16550 *com_port, int baud_divisor)
+void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor)
 {
- com_port->ier = 0x00;
- com_port->lcr = LCR_BKSE;              /* Access baud rate */
- com_port->dll = baud_divisor & 0xff;   /* 9600 baud */
- com_port->dlm = (baud_divisor >> 8) & 0xff;
- com_port->lcr = LCR_8N1;               /* 8 data, 1 stop, no parity */
- com_port->mcr = MCR_RTS;     /* RTS/DTR */
- com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR;                  /* Clear & enable FIFOs */
+	com_port->ier = 0x00;
+	com_port->lcr = LCR_BKSE;	/* Access baud rate */
+	com_port->dll = baud_divisor & 0xff;	/* 9600 baud */
+	com_port->dlm = (baud_divisor >> 8) & 0xff;
+	com_port->lcr = LCR_8N1;	/* 8 data, 1 stop, no parity */
+	com_port->mcr = MCR_RTS;	/* RTS/DTR */
+	com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR;	/* Clear & enable FIFOs */
 }
 
-void NS16550_putc(volatile struct NS16550 *com_port, unsigned char c)
+void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c)
 {
- while ((com_port->lsr & LSR_THRE) == 0) ;
- com_port->thr = c;
+	while ((com_port->lsr & LSR_THRE) == 0);
+	com_port->thr = c;
 }
 
-unsigned char
-NS16550_getc(volatile struct NS16550 *com_port)
+unsigned char NS16550_getc (volatile struct NS16550 *com_port)
 {
- while ((com_port->lsr & LSR_DR) == 0) ;
- return (com_port->rbr);
+	while ((com_port->lsr & LSR_DR) == 0);
+	return (com_port->rbr);
 }
 
-int NS16550_tstc(volatile struct NS16550 *com_port)
+int NS16550_tstc (volatile struct NS16550 *com_port)
 {
- return ((com_port->lsr & LSR_DR) != 0);
+	return ((com_port->lsr & LSR_DR) != 0);
 }

board/bmw/ns16550.h

@@ -12,20 +12,19 @@
  */
 
 
-struct NS16550
- {
-  unsigned char rbrthrdlb;  /* 0 */
-  unsigned char ierdmb;     /* 1 */
-  unsigned char iirfcrafr;  /* 2 */
-  unsigned char lcr;         /* 3 */
-  unsigned char mcr;         /* 4 */
-  unsigned char lsr;         /* 5 */
-  unsigned char msr;         /* 6 */
-  unsigned char scr;         /* 7 */
-  unsigned char reserved[2]; /* 8 & 9 */
-  unsigned char dsr;         /* 10 */
-  unsigned char dcr;         /* 11 */
- };
+struct NS16550 {
+	unsigned char rbrthrdlb;	/* 0 */
+	unsigned char ierdmb;		/* 1 */
+	unsigned char iirfcrafr;	/* 2 */
+	unsigned char lcr;		/* 3 */
+	unsigned char mcr;		/* 4 */
+	unsigned char lsr;		/* 5 */
+	unsigned char msr;		/* 6 */
+	unsigned char scr;		/* 7 */
+	unsigned char reserved[2];	/* 8 & 9 */
+	unsigned char dsr;		/* 10 */
+	unsigned char dcr;		/* 11 */
+};
 
 
 #define rbr rbrthrdlb
@@ -37,44 +36,44 @@ struct NS16550
 #define fcr iirfcrafr
 #define afr iirfcrafr
 
-#define FCR_FIFO_EN     0x01    /*fifo enable*/
-#define FCR_RXSR        0x02    /*reciever soft reset*/
-#define FCR_TXSR        0x04    /*transmitter soft reset*/
-#define FCR_DMS		0x08    /* DMA Mode Select */
+#define FCR_FIFO_EN     0x01	/*fifo enable */
+#define FCR_RXSR        0x02	/*reciever soft reset */
+#define FCR_TXSR        0x04	/*transmitter soft reset */
+#define FCR_DMS		0x08	/* DMA Mode Select */
 
-#define MCR_RTS         0x02    /* Readyu to Send */
+#define MCR_RTS         0x02	/* Readyu to Send */
 #define MCR_LOOP	0x10	/* Local loopback mode enable */
 /* #define MCR_DTR         0x01    noton 8245 duart */
 /* #define MCR_DMA_EN      0x04    noton 8245 duart */
 /* #define MCR_TX_DFR      0x08    noton 8245 duart */
 
-#define LCR_WLS_MSK 0x03    /* character length slect mask*/
-#define LCR_WLS_5   0x00    /* 5 bit character length */
-#define LCR_WLS_6   0x01    /* 6 bit character length */
-#define LCR_WLS_7   0x02    /* 7 bit character length */
-#define LCR_WLS_8   0x03    /* 8 bit character length */
-#define LCR_STB     0x04    /* Number of stop Bits, off = 1, on = 1.5 or 2) */
-#define LCR_PEN     0x08    /* Parity eneble*/
-#define LCR_EPS     0x10    /* Even Parity Select*/
-#define LCR_STKP    0x20    /* Stick Parity*/
-#define LCR_SBRK    0x40    /* Set Break*/
-#define LCR_BKSE    0x80    /* Bank select enable - aka DLAB on 8245 */
+#define LCR_WLS_MSK 0x03	/* character length slect mask */
+#define LCR_WLS_5   0x00	/* 5 bit character length */
+#define LCR_WLS_6   0x01	/* 6 bit character length */
+#define LCR_WLS_7   0x02	/* 7 bit character length */
+#define LCR_WLS_8   0x03	/* 8 bit character length */
+#define LCR_STB     0x04	/* Number of stop Bits, off = 1, on = 1.5 or 2) */
+#define LCR_PEN     0x08	/* Parity eneble */
+#define LCR_EPS     0x10	/* Even Parity Select */
+#define LCR_STKP    0x20	/* Stick Parity */
+#define LCR_SBRK    0x40	/* Set Break */
+#define LCR_BKSE    0x80	/* Bank select enable - aka DLAB on 8245 */
 
-#define LSR_DR      0x01    /* Data ready */
-#define LSR_OE      0x02    /* Overrun */
-#define LSR_PE      0x04    /* Parity error */
-#define LSR_FE      0x08    /* Framing error */
-#define LSR_BI      0x10    /* Break */
-#define LSR_THRE    0x20    /* Xmit holding register empty */
-#define LSR_TEMT    0x40    /* Xmitter empty */
-#define LSR_ERR     0x80    /* Error */
+#define LSR_DR      0x01	/* Data ready */
+#define LSR_OE      0x02	/* Overrun */
+#define LSR_PE      0x04	/* Parity error */
+#define LSR_FE      0x08	/* Framing error */
+#define LSR_BI      0x10	/* Break */
+#define LSR_THRE    0x20	/* Xmit holding register empty */
+#define LSR_TEMT    0x40	/* Xmitter empty */
+#define LSR_ERR     0x80	/* Error */
 
 /* useful defaults for LCR*/
 #define LCR_8N1     0x03
 
 
-volatile struct NS16550 * NS16550_init(int chan, int baud_divisor);
-void NS16550_putc(volatile struct NS16550 *com_port, unsigned char c);
-unsigned char NS16550_getc(volatile struct NS16550 *com_port);
-int NS16550_tstc(volatile struct NS16550 *com_port);
-void NS16550_reinit(volatile struct NS16550 *com_port, int baud_divisor);
+volatile struct NS16550 *NS16550_init (int chan, int baud_divisor);
+void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c);
+unsigned char NS16550_getc (volatile struct NS16550 *com_port);
+int NS16550_tstc (volatile struct NS16550 *com_port);
+void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor);

board/eltec/bab7xx/bab7xx.c

@@ -37,17 +37,18 @@
  */
 ulong bab7xx_get_bus_freq (void)
 {
-    /*
-     * The GPIO Port 1 on BAB7xx reflects the bus speed.
-     */
-    volatile struct GPIO *gpio = (struct GPIO *)(CFG_ISA_IO + CFG_NS87308_GPIO_BASE);
+	/*
+	 * The GPIO Port 1 on BAB7xx reflects the bus speed.
+	 */
+	volatile struct GPIO *gpio =
+		(struct GPIO *) (CFG_ISA_IO + CFG_NS87308_GPIO_BASE);
 
-    unsigned char data = gpio->dta1;
+	unsigned char data = gpio->dta1;
 
-    if (data & 0x02)
-	return 66666666;
+	if (data & 0x02)
+		return 66666666;
 
-    return 83333333;
+	return 83333333;
 }
 
 /*---------------------------------------------------------------------------*/
@@ -57,24 +58,26 @@ ulong bab7xx_get_bus_freq (void)
  */
 ulong bab7xx_get_gclk_freq (void)
 {
-    static const int pllratio_to_factor[] = {
-	00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35, 00,
-    };
+	static const int pllratio_to_factor[] = {
+		00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35,
+			00,
+	};
 
-    return pllratio_to_factor[get_hid1 () >> 28] * (bab7xx_get_bus_freq() / 10);
+	return pllratio_to_factor[get_hid1 () >> 28] *
+		(bab7xx_get_bus_freq () / 10);
 }
 
 /*----------------------------------------------------------------------------*/
 
 int checkcpu (void)
 {
-    uint pvr  = get_pvr();
+	uint pvr = get_pvr ();
 
-    printf ("MPC7xx V%d.%d",(pvr >> 8) & 0xFF, pvr & 0xFF);
-    printf (" at %ld / %ld MHz\n",  bab7xx_get_gclk_freq()/1000000,
-	    bab7xx_get_bus_freq()/1000000);
+	printf ("MPC7xx V%d.%d", (pvr >> 8) & 0xFF, pvr & 0xFF);
+	printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq () / 1000000,
+		bab7xx_get_bus_freq () / 1000000);
 
-    return (0);
+	return (0);
 }
 
 /* ------------------------------------------------------------------------- */
@@ -82,20 +85,20 @@ int checkcpu (void)
 int checkboard (void)
 {
 #ifdef CFG_ADDRESS_MAP_A
-    puts ("Board: ELTEC BAB7xx PReP\n");
+	puts ("Board: ELTEC BAB7xx PReP\n");
 #else
-    puts ("Board: ELTEC BAB7xx CHRP\n");
+	puts ("Board: ELTEC BAB7xx CHRP\n");
 #endif
-    return (0);
+	return (0);
 }
 
 /* ------------------------------------------------------------------------- */
 
 int checkflash (void)
 {
-    /* TODO: XXX XXX XXX */
-    printf ("2 MB ## Test not implemented yet ##\n");
-    return (0);
+	/* TODO: XXX XXX XXX */
+	printf ("2 MB ## Test not implemented yet ##\n");
+	return (0);
 }
 
 /* ------------------------------------------------------------------------- */
@@ -103,77 +106,75 @@ int checkflash (void)
 
 static unsigned int mpc106_read_cfg_dword (unsigned int reg)
 {
-    unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
+	unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
 
-    out32r(MPC106_REG_ADDR, reg_addr);
+	out32r (MPC106_REG_ADDR, reg_addr);
 
-    return (in32r(MPC106_REG_DATA | (reg & 0x3)));
+	return (in32r (MPC106_REG_DATA | (reg & 0x3)));
 }
 
 /* ------------------------------------------------------------------------- */
 
 long int dram_size (int board_type)
 {
-    /* No actual initialisation to do - done when setting up
-     * PICRs MCCRs ME/SARs etc in ram_init.S.
-     */
+	/* No actual initialisation to do - done when setting up
+	 * PICRs MCCRs ME/SARs etc in ram_init.S.
+	 */
 
-    register unsigned long i, msar1, mear1, memSize;
+	register unsigned long i, msar1, mear1, memSize;
 
 #if defined(CFG_MEMTEST)
-    register unsigned long reg;
+	register unsigned long reg;
 
-    printf("Testing DRAM\n");
+	printf ("Testing DRAM\n");
 
-    /* write each mem addr with it's address */
-    for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
-    *reg = reg;
+	/* write each mem addr with it's address */
+	for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4)
+		*reg = reg;
 
-    for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
-    {
-	if (*reg != reg)
-	    return -1;
-    }
+	for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) {
+		if (*reg != reg)
+			return -1;
+	}
 #endif
 
-    /*
-    * Since MPC106 memory controller chip has already been set to
-    * control all memory, just read and interpret its memory boundery register.
-    */
-    memSize = 0;
-    msar1 = mpc106_read_cfg_dword(MPC106_MSAR1);
-    mear1 = mpc106_read_cfg_dword(MPC106_MEAR1);
-    i     = mpc106_read_cfg_dword(MPC106_MBER) & 0xf;
-
-    do
-    {
-	if (i & 0x01)   /* is bank enabled ? */
-	    memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
-	msar1 >>= 8;
-	mear1 >>= 8;
-	i     >>= 1;
-    } while (i);
-
-    return (memSize * 0x100000);
+	/*
+	 * Since MPC106 memory controller chip has already been set to
+	 * control all memory, just read and interpret its memory boundery register.
+	 */
+	memSize = 0;
+	msar1 = mpc106_read_cfg_dword (MPC106_MSAR1);
+	mear1 = mpc106_read_cfg_dword (MPC106_MEAR1);
+	i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf;
+
+	do {
+		if (i & 0x01)	/* is bank enabled ? */
+			memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
+		msar1 >>= 8;
+		mear1 >>= 8;
+		i >>= 1;
+	} while (i);
+
+	return (memSize * 0x100000);
 }
 
 /* ------------------------------------------------------------------------- */
 
-long int initdram(int board_type)
+long int initdram (int board_type)
 {
-    return dram_size(board_type);
+	return dram_size (board_type);
 }
 
 /* ------------------------------------------------------------------------- */
 
 void after_reloc (ulong dest_addr)
 {
-    DECLARE_GLOBAL_DATA_PTR;
+	DECLARE_GLOBAL_DATA_PTR;
 
-    /*
-     * Jump to the main U-Boot board init code
-     */
-    board_init_r((gd_t *)gd, dest_addr);
+	/*
+	 * Jump to the main U-Boot board init code
+	 */
+	board_init_r ((gd_t *) gd, dest_addr);
 }
 
 /* ------------------------------------------------------------------------- */
@@ -182,14 +183,13 @@ void after_reloc (ulong dest_addr)
  * do_reset is done here because in this case it is board specific, since the
  * 7xx CPUs can only be reset by external HW (the RTC in this case).
  */
-void
-do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+void do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 {
 #if defined(CONFIG_RTC_MK48T59)
-    /* trigger watchdog immediately */
-    rtc_set_watchdog(1, RTC_WD_RB_16TH);
+	/* trigger watchdog immediately */
+	rtc_set_watchdog (1, RTC_WD_RB_16TH);
 #else
-    #error "You must define the macro CONFIG_RTC_MK48T59."
+#error "You must define the macro CONFIG_RTC_MK48T59."
 #endif
 }
 
@@ -200,16 +200,16 @@ do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
  * Since the 7xx CPUs don't have an internal watchdog, this function is
  * board specific.  We use the RTC here.
  */
-void watchdog_reset(void)
+void watchdog_reset (void)
 {
 #if defined(CONFIG_RTC_MK48T59)
-    /* we use a 32 sec watchdog timer */
-    rtc_set_watchdog(8, RTC_WD_RB_4);
+	/* we use a 32 sec watchdog timer */
+	rtc_set_watchdog (8, RTC_WD_RB_4);
 #else
-    #error "You must define the macro CONFIG_RTC_MK48T59."
+#error "You must define the macro CONFIG_RTC_MK48T59."
 #endif
 }
-#endif    /* CONFIG_WATCHDOG */
+#endif /* CONFIG_WATCHDOG */
 
 /* ------------------------------------------------------------------------- */
 
@@ -218,29 +218,28 @@ extern GraphicDevice smi;
 
 void video_get_info_str (int line_number, char *info)
 {
-    /* init video info strings for graphic console */
-    switch (line_number)
-    {
-    case 1:
-	sprintf (info," MPC7xx V%d.%d at %ld / %ld MHz",
-	    (get_pvr() >> 8) & 0xFF,
-	    get_pvr() & 0xFF,
-	    bab7xx_get_gclk_freq()/1000000,
-	    bab7xx_get_bus_freq()/1000000);
+	/* init video info strings for graphic console */
+	switch (line_number) {
+	case 1:
+		sprintf (info, " MPC7xx V%d.%d at %ld / %ld MHz",
+			 (get_pvr () >> 8) & 0xFF,
+			 get_pvr () & 0xFF,
+			 bab7xx_get_gclk_freq () / 1000000,
+			 bab7xx_get_bus_freq () / 1000000);
+		return;
+	case 2:
+		sprintf (info,
+			 " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
+			 dram_size (0) / 0x100000, flash_init () / 0x100000);
+		return;
+	case 3:
+		sprintf (info, " %s", smi.modeIdent);
+		return;
+	}
+
+	/* no more info lines */
+	*info = 0;
 	return;
-    case 2:
-	sprintf (info, " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
-	    dram_size(0)/0x100000,
-	    flash_init()/0x100000);
-	return;
-    case 3:
-	sprintf (info, " %s", smi.modeIdent);
-	return;
-    }
-
-    /* no more info lines */
-    *info = 0;
-    return;
 }
 #endif
 

board/ep8260/ep8260.c

@@ -190,21 +190,22 @@ const iop_conf_t iop_conf_tab[4][32] = {
 */
 int board_early_init_f (void)
 {
-    volatile t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE;
-    volatile immap_t *immap  = (immap_t *)CFG_IMMR;
-    volatile memctl8260_t *memctl = &immap->im_memctl;
-    memctl->memc_br4 = CFG_BR4_PRELIM;
-    memctl->memc_or4 = CFG_OR4_PRELIM;
-    regs->bcsr1 = 0x62; /* to enable terminal on SMC1 */
-    regs->bcsr2 = 0x30;	/* enable NVRAM and writing FLASH */
-    return 0;
+	volatile t_ep_regs *regs = (t_ep_regs *) CFG_REGS_BASE;
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile memctl8260_t *memctl = &immap->im_memctl;
+
+	memctl->memc_br4 = CFG_BR4_PRELIM;
+	memctl->memc_or4 = CFG_OR4_PRELIM;
+	regs->bcsr1 = 0x62;	/* to enable terminal on SMC1 */
+	regs->bcsr2 = 0x30;	/* enable NVRAM and writing FLASH */
+	return 0;
 }
 
-void
-reset_phy(void)
+void reset_phy (void)
 {
-    volatile t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE;
-    regs->bcsr4 = 0xC0;
+	volatile t_ep_regs *regs = (t_ep_regs *) CFG_REGS_BASE;
+
+	regs->bcsr4 = 0xC0;
 }
 
 /*
@@ -213,15 +214,21 @@ reset_phy(void)
  * Thats why its a static interpretation ...
 */
 
-int
-checkboard(void)
+int checkboard (void)
 {
-	volatile t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE;
-	uint major=0, minor=0;
+	volatile t_ep_regs *regs = (t_ep_regs *) CFG_REGS_BASE;
+	uint major = 0, minor = 0;
+
 	switch (regs->bcsr0) {
-		case 0x02: major = 1; break;
-		case 0x03: major = 1; minor = 1; break;
-		default: break;
+	case 0x02:
+		major = 1;
+		break;
+	case 0x03:
+		major = 1;
+		minor = 1;
+		break;
+	default:
+		break;
 	}
 	printf ("Board: Embedded Planet EP8260, Revision %d.%d\n",
 		major, minor);
@@ -232,13 +239,13 @@ checkboard(void)
 /* ------------------------------------------------------------------------- */
 
 
-long int
-initdram(int board_type)
+long int initdram (int board_type)
 {
-	volatile immap_t *immap  = (immap_t *)CFG_IMMR;
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
 	volatile memctl8260_t *memctl = &immap->im_memctl;
 	volatile uchar c = 0;
-	volatile uchar *ramaddr = (uchar *)(CFG_SDRAM_BASE) + 0x110;
+	volatile uchar *ramaddr = (uchar *) (CFG_SDRAM_BASE) + 0x110;
+
 /*
 	ulong psdmr = CFG_PSDMR;
 #ifdef CFG_LSDRAM
@@ -288,7 +295,7 @@ initdram(int board_type)
 #ifndef CFG_RAMBOOT
 #ifdef CFG_LSDRAM
 	size += CFG_SDRAM1_SIZE;
-	ramaddr = (uchar *)(CFG_SDRAM1_BASE) + 0x8c;
+	ramaddr = (uchar *) (CFG_SDRAM1_BASE) + 0x8c;
 	memctl->memc_lsrt = CFG_LSRT;
 
 	memctl->memc_lsdmr = (ulong) CFG_LSDMR | PSDMR_OP_PREA;

board/evb64260/ecctest.c

+indent: Standard input:27: Warning:old style assignment ambiguity in "=*".  Assuming "= *"
+
 #ifdef ECC_TEST
-static inline void ecc_off(void)
+static inline void ecc_off (void)
 {
-	*(volatile int *)(INTERNAL_REG_BASE_ADDR+0x4b4) &= ~0x00200000;
+	*(volatile int *) (INTERNAL_REG_BASE_ADDR + 0x4b4) &= ~0x00200000;
 }
 
-static inline void ecc_on(void)
+static inline void ecc_on (void)
 {
-	*(volatile int *)(INTERNAL_REG_BASE_ADDR+0x4b4) |= 0x00200000;
+	*(volatile int *) (INTERNAL_REG_BASE_ADDR + 0x4b4) |= 0x00200000;
 }
 
-static int putshex(const char *buf, int len)
+static int putshex (const char *buf, int len)
 {
-    int i;
-    for (i=0;i<len;i++) {
-	printf("%02x", buf[i]);
-    }
-    return 0;
+	int i;
+
+	for (i = 0; i < len; i++) {
+		printf ("%02x", buf[i]);
+	}
+	return 0;
 }
 
-static int char_memcpy(void *d, const void *s, int len)
+static int char_memcpy (void *d, const void *s, int len)
 {
-    int i;
-    char *cd=d;
-    const char *cs=s;
-    for(i=0;i<len;i++) {
-	*(cd++)=*(cs++);
-    }
-    return 0;
+	int i;
+	char *cd = d;
+	const char *cs = s;
+
+	for (i = 0; i < len; i++) {
+		*(cd++) = *(cs++);
+	}
+	return 0;
 }
 
-static int memory_test(char *buf)
+static int memory_test (char *buf)
 {
-    const char src[][16]={
-	{   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0},
-	{0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01},
-	{0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02},
-	{0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04},
-	{0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08},
-	{0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10},
-	{0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20},
-	{0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40},