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Librem5
uboot-imx
Commits
c021880a
Commit
c021880a
authored
Mar 27, 2003
by
wdenk
Browse files
* Add support for MIPS32 4Kc CPUs
* Add support for INCA-IP Board
parent
ac6dbb85
Changes
25
Expand all
Hide whitespace changes
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CHANGELOG
View file @
c021880a
...
...
@@ -3,7 +3,9 @@ Changes since U-Boot 0.2.2:
======================================================================
* Patch by Rick Bronson, 16 Mar 2003:
Add support for Atmel AT91RM9200DK w/NAND
- Add NAND flash support for reading, writing, and erasing NAND
flash (certain forms of which are called SmartMedia).
- Add support for Atmel AT91RM9200DK ARM920T based development kit.
* Patches by Robert Schwebel, 19 Mar 2003:
- use arm-linux-gcc as default compiler for ARM
...
...
@@ -36,6 +38,12 @@ Changes since U-Boot 0.2.2:
to existing PPC405GP designs.
- Clip udiv to 5 bits on PPC405 (serial.c).
* Extend INCAIP board support:
- add automatic RAM size detection
- add "bdinfo" command
- pass flash address and size to Linux kernel
- switch to 150 MHz clock
* Avoid flicker on the TRAB's VFD by synchronizing the enable with
the HSYNC/VSYNC. Requires new CPLD code (Version 101 for Rev. 100
boards, version 153 for Rev. 200 boards).
...
...
@@ -179,6 +187,10 @@ Changes since U-Boot 0.2.2:
* Patch by Stefan Roese, 10 Feb 2003:
Add support for 4MB and 128MB onboard SDRAM (cpu/ppc4xx/sdram.c)
* Add support for MIPS32 4Kc CPUs
* Add support for INCA-IP Board
======================================================================
Changes for U-Boot 0.2.2:
======================================================================
...
...
CREDITS
View file @
c021880a
...
...
@@ -48,7 +48,7 @@ D: 8xxrom-0.3.0
N: Rick Bronson
E: rick@efn.org
D: Atmel AT91RM9200DK
w/
NAND support
D: Atmel AT91RM9200DK
and
NAND support
N: David Brown
E: DBrown03@harris.com
...
...
MAKEALL
View file @
c021880a
...
...
@@ -107,6 +107,14 @@ LIST_xscale="cradle csb226 innokom lubbock"
LIST_arm
=
"
${
LIST_SA
}
${
LIST_ARM7
}
${
LIST_ARM9
}
${
LIST_xscale
}
"
#########################################################################
## MIPS 4Kc Systems
#########################################################################
LIST_mips4kc
=
"incaip"
LIST_mips
=
"
${
LIST_mips4kc
}
"
#----- for now, just run PPC by default -----
[
$#
=
0
]
&&
set
$LIST_ppc
...
...
@@ -128,7 +136,7 @@ build_target() {
for
arg
in
$@
do
case
"
$arg
"
in
8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|xscale
)
8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|xscale
|mips
)
for
target
in
`
eval echo
'$LIST_'
${
arg
}
`
do
build_target
${
target
}
...
...
board/incaip/Makefile
0 → 100644
View file @
c021880a
#
# (C) Copyright 2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include
$(TOPDIR)/config.mk
LIB
=
lib
$(BOARD)
.a
OBJS
=
$(BOARD)
.o flash.o
SOBJS
=
memsetup.o
$(LIB)
:
.depend $(OBJS) $(SOBJS)
$(AR)
crv
$@
$^
#########################################################################
.depend
:
Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC)
-M
$(CFLAGS)
$(SOBJS:.o=.S)
$(OBJS:.o=.c)
>
$@
sinclude
.depend
#########################################################################
board/incaip/config.mk
0 → 100644
View file @
c021880a
#
# (C) Copyright 2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# INCA-IP board with MIPS 4Kc CPU core
#
# ROM version
TEXT_BASE
=
0xB0000000
# RAM version
#TEXT_BASE = 0x80100000
board/incaip/flash.c
0 → 100644
View file @
c021880a
/*
* (C) Copyright 2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include
<common.h>
#include
<asm/inca-ip.h>
flash_info_t
flash_info
[
CFG_MAX_FLASH_BANKS
];
/* info for FLASH chips */
/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
* has nothing to do with the flash chip being 8-bit or 16-bit.
*/
#ifdef CONFIG_FLASH_16BIT
typedef
unsigned
short
FLASH_PORT_WIDTH
;
typedef
volatile
unsigned
short
FLASH_PORT_WIDTHV
;
#define FLASH_ID_MASK 0xFFFF
#else
typedef
unsigned
long
FLASH_PORT_WIDTH
;
typedef
volatile
unsigned
long
FLASH_PORT_WIDTHV
;
#define FLASH_ID_MASK 0xFFFFFFFF
#endif
#define FPW FLASH_PORT_WIDTH
#define FPWV FLASH_PORT_WIDTHV
#define ORMASK(size) ((-size) & OR_AM_MSK)
#if 0
#define FLASH_CYCLE1 0x0555
#define FLASH_CYCLE2 0x02aa
#else
#define FLASH_CYCLE1 0x0554
#define FLASH_CYCLE2 0x02ab
#endif
/*-----------------------------------------------------------------------
* Functions
*/
static
ulong
flash_get_size
(
FPWV
*
addr
,
flash_info_t
*
info
);
static
void
flash_reset
(
flash_info_t
*
info
);
static
int
write_word_intel
(
flash_info_t
*
info
,
FPWV
*
dest
,
FPW
data
);
static
int
write_word_amd
(
flash_info_t
*
info
,
FPWV
*
dest
,
FPW
data
);
static
void
flash_get_offsets
(
ulong
base
,
flash_info_t
*
info
);
static
flash_info_t
*
flash_get_info
(
ulong
base
);
/*-----------------------------------------------------------------------
* flash_init()
*
* sets up flash_info and returns size of FLASH (bytes)
*/
unsigned
long
flash_init
(
void
)
{
unsigned
long
size
=
0
;
int
i
;
/* Init: no FLASHes known */
for
(
i
=
0
;
i
<
CFG_MAX_FLASH_BANKS
;
++
i
)
{
ulong
flashbase
=
(
i
==
0
)
?
PHYS_FLASH_1
:
PHYS_FLASH_2
;
ulong
*
buscon
=
(
ulong
*
)
((
i
==
0
)
?
INCA_IP_EBU_EBU_BUSCON0
:
INCA_IP_EBU_EBU_BUSCON2
);
/* Disable write protection */
*
buscon
&=
~
INCA_IP_EBU_EBU_BUSCON1_WRDIS
;
#if 1
memset
(
&
flash_info
[
i
],
0
,
sizeof
(
flash_info_t
));
#endif
flash_info
[
i
].
size
=
flash_get_size
((
FPW
*
)
flashbase
,
&
flash_info
[
i
]);
if
(
flash_info
[
i
].
flash_id
==
FLASH_UNKNOWN
)
{
printf
(
"## Unknown FLASH on Bank %d - Size = 0x%08lx
\n
"
,
i
,
flash_info
[
i
].
size
);
}
size
+=
flash_info
[
i
].
size
;
}
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
/* monitor protection ON by default */
flash_protect
(
FLAG_PROTECT_SET
,
CFG_MONITOR_BASE
,
CFG_MONITOR_BASE
+
CFG_MONITOR_LEN
-
1
,
flash_get_info
(
CFG_MONITOR_BASE
));
#endif
#ifdef CFG_ENV_IS_IN_FLASH
/* ENV protection ON by default */
flash_protect
(
FLAG_PROTECT_SET
,
CFG_ENV_ADDR
,
CFG_ENV_ADDR
+
CFG_ENV_SIZE
-
1
,
flash_get_info
(
CFG_ENV_ADDR
));
#endif
return
size
;
}
/*-----------------------------------------------------------------------
*/
static
void
flash_reset
(
flash_info_t
*
info
)
{
FPWV
*
base
=
(
FPWV
*
)(
info
->
start
[
0
]);
/* Put FLASH back in read mode */
if
((
info
->
flash_id
&
FLASH_VENDMASK
)
==
FLASH_MAN_INTEL
)
*
base
=
(
FPW
)
0x00FF00FF
;
/* Intel Read Mode */
else
if
((
info
->
flash_id
&
FLASH_VENDMASK
)
==
FLASH_MAN_AMD
)
*
base
=
(
FPW
)
0x00F000F0
;
/* AMD Read Mode */
}
/*-----------------------------------------------------------------------
*/
static
void
flash_get_offsets
(
ulong
base
,
flash_info_t
*
info
)
{
int
i
;
/* set up sector start address table */
if
((
info
->
flash_id
&
FLASH_VENDMASK
)
==
FLASH_MAN_INTEL
&&
(
info
->
flash_id
&
FLASH_BTYPE
))
{
int
bootsect_size
;
/* number of bytes/boot sector */
int
sect_size
;
/* number of bytes/regular sector */
bootsect_size
=
0x00002000
*
(
sizeof
(
FPW
)
/
2
);
sect_size
=
0x00010000
*
(
sizeof
(
FPW
)
/
2
);
/* set sector offsets for bottom boot block type */
for
(
i
=
0
;
i
<
8
;
++
i
)
{
info
->
start
[
i
]
=
base
+
(
i
*
bootsect_size
);
}
for
(
i
=
8
;
i
<
info
->
sector_count
;
i
++
)
{
info
->
start
[
i
]
=
base
+
((
i
-
7
)
*
sect_size
);
}
}
else
if
((
info
->
flash_id
&
FLASH_VENDMASK
)
==
FLASH_MAN_AMD
&&
(
info
->
flash_id
&
FLASH_TYPEMASK
)
==
FLASH_AM640U
)
{
int
sect_size
;
/* number of bytes/sector */
sect_size
=
0x00010000
*
(
sizeof
(
FPW
)
/
2
);
/* set up sector start address table (uniform sector type) */
for
(
i
=
0
;
i
<
info
->
sector_count
;
i
++
)
info
->
start
[
i
]
=
base
+
(
i
*
sect_size
);
}
}
/*-----------------------------------------------------------------------
*/
static
flash_info_t
*
flash_get_info
(
ulong
base
)
{
int
i
;
flash_info_t
*
info
;
for
(
i
=
0
;
i
<
CFG_MAX_FLASH_BANKS
;
i
++
)
{
info
=
&
flash_info
[
i
];
if
(
info
->
start
[
0
]
<=
base
&&
base
<
info
->
start
[
0
]
+
info
->
size
)
break
;
}
return
i
==
CFG_MAX_FLASH_BANKS
?
0
:
info
;
}
/*-----------------------------------------------------------------------
*/
void
flash_print_info
(
flash_info_t
*
info
)
{
int
i
;
uchar
*
boottype
;
uchar
*
bootletter
;
uchar
*
fmt
;
uchar
botbootletter
[]
=
"B"
;
uchar
topbootletter
[]
=
"T"
;
uchar
botboottype
[]
=
"bottom boot sector"
;
uchar
topboottype
[]
=
"top boot sector"
;
if
(
info
->
flash_id
==
FLASH_UNKNOWN
)
{
printf
(
"missing or unknown FLASH type
\n
"
);
return
;
}
switch
(
info
->
flash_id
&
FLASH_VENDMASK
)
{
case
FLASH_MAN_AMD
:
printf
(
"AMD "
);
break
;
case
FLASH_MAN_BM
:
printf
(
"BRIGHT MICRO "
);
break
;
case
FLASH_MAN_FUJ
:
printf
(
"FUJITSU "
);
break
;
case
FLASH_MAN_SST
:
printf
(
"SST "
);
break
;
case
FLASH_MAN_STM
:
printf
(
"STM "
);
break
;
case
FLASH_MAN_INTEL
:
printf
(
"INTEL "
);
break
;
default:
printf
(
"Unknown Vendor "
);
break
;
}
/* check for top or bottom boot, if it applies */
if
(
info
->
flash_id
&
FLASH_BTYPE
)
{
boottype
=
botboottype
;
bootletter
=
botbootletter
;
}
else
{
boottype
=
topboottype
;
bootletter
=
topbootletter
;
}
switch
(
info
->
flash_id
&
FLASH_TYPEMASK
)
{
case
FLASH_AM640U
:
fmt
=
"29LV641D (64 Mbit, uniform sectors)
\n
"
;
break
;
case
FLASH_28F800C3B
:
case
FLASH_28F800C3T
:
fmt
=
"28F800C3%s (8 Mbit, %s)
\n
"
;
break
;
case
FLASH_INTEL800B
:
case
FLASH_INTEL800T
:
fmt
=
"28F800B3%s (8 Mbit, %s)
\n
"
;
break
;
case
FLASH_28F160C3B
:
case
FLASH_28F160C3T
:
fmt
=
"28F160C3%s (16 Mbit, %s)
\n
"
;
break
;
case
FLASH_INTEL160B
:
case
FLASH_INTEL160T
:
fmt
=
"28F160B3%s (16 Mbit, %s)
\n
"
;
break
;
case
FLASH_28F320C3B
:
case
FLASH_28F320C3T
:
fmt
=
"28F320C3%s (32 Mbit, %s)
\n
"
;
break
;
case
FLASH_INTEL320B
:
case
FLASH_INTEL320T
:
fmt
=
"28F320B3%s (32 Mbit, %s)
\n
"
;
break
;
case
FLASH_28F640C3B
:
case
FLASH_28F640C3T
:
fmt
=
"28F640C3%s (64 Mbit, %s)
\n
"
;
break
;
case
FLASH_INTEL640B
:
case
FLASH_INTEL640T
:
fmt
=
"28F640B3%s (64 Mbit, %s)
\n
"
;
break
;
default:
fmt
=
"Unknown Chip Type
\n
"
;
break
;
}
printf
(
fmt
,
bootletter
,
boottype
);
printf
(
" Size: %ld MB in %d Sectors
\n
"
,
info
->
size
>>
20
,
info
->
sector_count
);
printf
(
" Sector Start Addresses:"
);
for
(
i
=
0
;
i
<
info
->
sector_count
;
++
i
)
{
if
((
i
%
5
)
==
0
)
{
printf
(
"
\n
"
);
}
printf
(
" %08lX%s"
,
info
->
start
[
i
],
info
->
protect
[
i
]
?
" (RO)"
:
" "
);
}
printf
(
"
\n
"
);
}
/*-----------------------------------------------------------------------
*/
/*
* The following code cannot be run from FLASH!
*/
ulong
flash_get_size
(
FPWV
*
addr
,
flash_info_t
*
info
)
{
/* Write auto select command: read Manufacturer ID */
/* Write auto select command sequence and test FLASH answer */
addr
[
FLASH_CYCLE1
]
=
(
FPW
)
0x00AA00AA
;
/* for AMD, Intel ignores this */
addr
[
FLASH_CYCLE2
]
=
(
FPW
)
0x00550055
;
/* for AMD, Intel ignores this */
addr
[
FLASH_CYCLE1
]
=
(
FPW
)
0x00900090
;
/* selects Intel or AMD */
/* The manufacturer codes are only 1 byte, so just use 1 byte.
* This works for any bus width and any FLASH device width.
*/
switch
(
addr
[
1
]
&
0xff
)
{
case
(
uchar
)
AMD_MANUFACT
:
info
->
flash_id
=
FLASH_MAN_AMD
;
break
;
case
(
uchar
)
INTEL_MANUFACT
:
info
->
flash_id
=
FLASH_MAN_INTEL
;
break
;
default:
info
->
flash_id
=
FLASH_UNKNOWN
;
info
->
sector_count
=
0
;
info
->
size
=
0
;
break
;
}
/* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
if
(
info
->
flash_id
!=
FLASH_UNKNOWN
)
switch
(
addr
[
0
])
{
case
(
FPW
)
AMD_ID_LV640U
:
/* 29LV640 and 29LV641 have same ID */
info
->
flash_id
+=
FLASH_AM640U
;
info
->
sector_count
=
128
;
info
->
size
=
0x00800000
*
(
sizeof
(
FPW
)
/
2
);
break
;
/* => 8 or 16 MB */
case
(
FPW
)
INTEL_ID_28F800C3B
:
info
->
flash_id
+=
FLASH_28F800C3B
;
info
->
sector_count
=
23
;
info
->
size
=
0x00100000
*
(
sizeof
(
FPW
)
/
2
);
break
;
/* => 1 or 2 MB */
case
(
FPW
)
INTEL_ID_28F800B3B
:
info
->
flash_id
+=
FLASH_INTEL800B
;
info
->
sector_count
=
23
;
info
->
size
=
0x00100000
*
(
sizeof
(
FPW
)
/
2
);
break
;
/* => 1 or 2 MB */
case
(
FPW
)
INTEL_ID_28F160C3B
:
info
->
flash_id
+=
FLASH_28F160C3B
;
info
->
sector_count
=
39
;
info
->
size
=
0x00200000
*
(
sizeof
(
FPW
)
/
2
);
break
;
/* => 2 or 4 MB */
case
(
FPW
)
INTEL_ID_28F160B3B
:
info
->
flash_id
+=
FLASH_INTEL160B
;
info
->
sector_count
=
39
;
info
->
size
=
0x00200000
*
(
sizeof
(
FPW
)
/
2
);
break
;
/* => 2 or 4 MB */
case
(
FPW
)
INTEL_ID_28F320C3B
:
info
->
flash_id
+=
FLASH_28F320C3B
;
info
->
sector_count
=
71
;
info
->
size
=
0x00400000
*
(
sizeof
(
FPW
)
/
2
);
break
;
/* => 4 or 8 MB */
case
(
FPW
)
INTEL_ID_28F320B3B
:
info
->
flash_id
+=
FLASH_INTEL320B
;
info
->
sector_count
=
71
;
info
->
size
=
0x00400000
*
(
sizeof
(
FPW
)
/
2
);
break
;
/* => 4 or 8 MB */
case
(
FPW
)
INTEL_ID_28F640C3B
:
info
->
flash_id
+=
FLASH_28F640C3B
;
info
->
sector_count
=
135
;
info
->
size
=
0x00800000
*
(
sizeof
(
FPW
)
/
2
);
break
;
/* => 8 or 16 MB */
case
(
FPW
)
INTEL_ID_28F640B3B
:
info
->
flash_id
+=
FLASH_INTEL640B
;
info
->
sector_count
=
135
;
info
->
size
=
0x00800000
*
(
sizeof
(
FPW
)
/
2
);
break
;
/* => 8 or 16 MB */
default:
info
->
flash_id
=
FLASH_UNKNOWN
;
info
->
sector_count
=
0
;
info
->
size
=
0
;
return
(
0
);
/* => no or unknown flash */
}
flash_get_offsets
((
ulong
)
addr
,
info
);
/* Put FLASH back in read mode */
flash_reset
(
info
);
return
(
info
->
size
);
}
/*-----------------------------------------------------------------------
*/
int
flash_erase
(
flash_info_t
*
info
,
int
s_first
,
int
s_last
)
{
FPWV
*
addr
;
int
flag
,
prot
,
sect
;
int
intel
=
(
info
->
flash_id
&
FLASH_VENDMASK
)
==
FLASH_MAN_INTEL
;
ulong
start
,
now
,
last
;
int
rcode
=
0
;
if
((
s_first
<
0
)
||
(
s_first
>
s_last
))
{
if
(
info
->
flash_id
==
FLASH_UNKNOWN
)
{
printf
(
"- missing
\n
"
);
}
else
{
printf
(
"- no sectors to erase
\n
"
);
}
return
1
;
}
switch
(
info
->
flash_id
&
FLASH_TYPEMASK
)
{
case
FLASH_INTEL800B
:
case
FLASH_INTEL160B
:
case
FLASH_INTEL320B
:
case
FLASH_INTEL640B
:
case
FLASH_28F800C3B
:
case
FLASH_28F160C3B
:
case
FLASH_28F320C3B
:
case
FLASH_28F640C3B
:
case
FLASH_AM640U
:
break
;
case
FLASH_UNKNOWN
:
default:
printf
(
"Can't erase unknown flash type %08lx - aborted
\n
"
,
info
->
flash_id
);
return
1
;
}
prot
=
0
;
for
(
sect
=
s_first
;
sect
<=
s_last
;
++
sect
)
{
if
(
info
->
protect
[
sect
])
{
prot
++
;
}
}
if
(
prot
)
{
printf
(
"- Warning: %d protected sectors will not be erased!
\n
"
,
prot
);
}
else
{
printf
(
"
\n
"
);
}
last
=
get_timer
(
0
);
/* Start erase on unprotected sectors */
for
(
sect
=
s_first
;
sect
<=
s_last
&&
rcode
==
0
;
sect
++
)
{
if
(
info
->
protect
[
sect
]
!=
0
)
/* protected, skip it */
continue
;
/* Disable interrupts which might cause a timeout here */
flag
=
disable_interrupts
();
addr
=
(
FPWV
*
)(
info
->
start
[
sect
]);
if
(
intel
)
{
*
addr
=
(
FPW
)
0x00500050
;
/* clear status register */
*
addr
=
(
FPW
)
0x00200020
;
/* erase setup */
*
addr
=
(
FPW
)
0x00D000D0
;
/* erase confirm */
}
else
{
/* must be AMD style if not Intel */
FPWV
*
base
;
/* first address in bank */
base
=
(
FPWV
*
)(
info
->
start
[
0
]);
base
[
FLASH_CYCLE1
]
=
(
FPW
)
0x00AA00AA
;
/* unlock */
base
[
FLASH_CYCLE2
]
=
(
FPW
)
0x00550055
;
/* unlock */
base
[
FLASH_CYCLE1
]
=
(
FPW
)
0x00800080
;
/* erase mode */
base
[
FLASH_CYCLE1
]
=
(
FPW
)
0x00AA00AA
;
/* unlock */
base
[
FLASH_CYCLE2
]
=
(
FPW
)
0x00550055
;
/* unlock */
*
addr
=
(
FPW
)
0x00300030
;
/* erase sector */
}
/* re-enable interrupts if necessary */
if
(
flag
)
enable_interrupts
();
start
=
get_timer
(
0
);
/* wait at least 50us for AMD, 80us for Intel.
* Let's wait 1 ms.
*/
udelay
(
1000
);