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Commit c2ae7d82 authored by Simon Glass's avatar Simon Glass Committed by Tom Rini
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Kconfig: Move SPL settings into their own file 

Move the SPL settings into common/spl where most of the SPL code is kept.
Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
parent 9ede2123
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Showing with 151 additions and 150 deletions
Kconfig
View file @ c2ae7d82
......@@ -138,74 +138,6 @@ endmenu # General setup
menu "Boot images"
config SUPPORT_SPL
bool
config SUPPORT_TPL
bool
config SPL
bool
depends on SUPPORT_SPL
prompt "Enable SPL"
help
If you want to build SPL as well as the normal image, say Y.
config SPL_SYS_MALLOC_SIMPLE
bool
depends on SPL
prompt "Only use malloc_simple functions in the SPL"
help
Say Y here to only use the *_simple malloc functions from
malloc_simple.c, rather then using the versions from dlmalloc.c;
this will make the SPL binary smaller at the cost of more heap
usage as the *_simple malloc functions do not re-use free-ed mem.
config SPL_STACK_R
depends on SPL
bool "Enable SDRAM location for SPL stack"
help
SPL starts off execution in SRAM and thus typically has only a small
stack available. Since SPL sets up DRAM while in its board_init_f()
function, it is possible for the stack to move there before
board_init_r() is reached. This option enables a special SDRAM
location for the SPL stack. U-Boot SPL switches to this after
board_init_f() completes, and before board_init_r() starts.
config SPL_STACK_R_ADDR
depends on SPL_STACK_R
hex "SDRAM location for SPL stack"
help
Specify the address in SDRAM for the SPL stack. This will be set up
before board_init_r() is called.
config SPL_STACK_R_MALLOC_SIMPLE_LEN
depends on SPL_STACK_R && SPL_SYS_MALLOC_SIMPLE
hex "Size of malloc_simple heap after switching to DRAM SPL stack"
default 0x100000
help
Specify the amount of the stack to use as memory pool for
malloc_simple after switching the stack to DRAM. This may be set
to give board_init_r() a larger heap then the initial heap in
SRAM which is limited to SYS_MALLOC_F_LEN bytes.
config SPL_SEPARATE_BSS
depends on SPL
bool "BSS section is in a different memory region from text"
help
Some platforms need a large BSS region in SPL and can provide this
because RAM is already set up. In this case BSS can be moved to RAM.
This option should then be enabled so that the correct device tree
location is used. Normally we put the device tree at the end of BSS
but with this option enabled, it goes at _image_binary_end.
config TPL
bool
depends on SPL && SUPPORT_TPL
prompt "Enable TPL"
help
If you want to build TPL as well as the normal image and SPL, say Y.
config FIT
bool "Support Flattened Image Tree"
help
......
common/Kconfig
View file @ c2ae7d82
......@@ -213,3 +213,5 @@ config VERSION_VARIABLE
version as printed by the "version" command.
Any change to this variable will be reverted at the
next reset.
source "common/spl/Kconfig"
common/spl/Kconfig 0 → 100644
View file @ c2ae7d82
config SUPPORT_SPL
bool
config SUPPORT_TPL
bool
config SPL
bool
depends on SUPPORT_SPL
prompt "Enable SPL"
help
If you want to build SPL as well as the normal image, say Y.
config SPL_SYS_MALLOC_SIMPLE
bool
depends on SPL
prompt "Only use malloc_simple functions in the SPL"
help
Say Y here to only use the *_simple malloc functions from
malloc_simple.c, rather then using the versions from dlmalloc.c;
this will make the SPL binary smaller at the cost of more heap
usage as the *_simple malloc functions do not re-use free-ed mem.
config SPL_STACK_R
depends on SPL
bool "Enable SDRAM location for SPL stack"
help
SPL starts off execution in SRAM and thus typically has only a small
stack available. Since SPL sets up DRAM while in its board_init_f()
function, it is possible for the stack to move there before
board_init_r() is reached. This option enables a special SDRAM
location for the SPL stack. U-Boot SPL switches to this after
board_init_f() completes, and before board_init_r() starts.
config SPL_STACK_R_ADDR
depends on SPL_STACK_R
hex "SDRAM location for SPL stack"
help
Specify the address in SDRAM for the SPL stack. This will be set up
before board_init_r() is called.
config SPL_STACK_R_MALLOC_SIMPLE_LEN
depends on SPL_STACK_R && SPL_SYS_MALLOC_SIMPLE
hex "Size of malloc_simple heap after switching to DRAM SPL stack"
default 0x100000
help
Specify the amount of the stack to use as memory pool for
malloc_simple after switching the stack to DRAM. This may be set
to give board_init_r() a larger heap then the initial heap in
SRAM which is limited to SYS_MALLOC_F_LEN bytes.
config SPL_SEPARATE_BSS
depends on SPL
bool "BSS section is in a different memory region from text"
help
Some platforms need a large BSS region in SPL and can provide this
because RAM is already set up. In this case BSS can be moved to RAM.
This option should then be enabled so that the correct device tree
location is used. Normally we put the device tree at the end of BSS
but with this option enabled, it goes at _image_binary_end.
config TPL
bool
depends on SPL && SUPPORT_TPL
prompt "Enable TPL"
help
If you want to build TPL as well as the normal image and SPL, say Y.
configs/A10-OLinuXino-Lime_defconfig
View file @ c2ae7d82
......@@ -7,8 +7,8 @@ CONFIG_SYS_CLK_FREQ=912000000
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/A10s-OLinuXino-M_defconfig
View file @ c2ae7d82
......@@ -8,8 +8,8 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=1
CONFIG_USB1_VBUS_PIN="PB10"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/A13-OLinuXinoM_defconfig
View file @ c2ae7d82
......@@ -12,8 +12,8 @@ CONFIG_VIDEO_LCD_POWER="PB10"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/A13-OLinuXino_defconfig
View file @ c2ae7d82
......@@ -14,8 +14,8 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DFU=y
......
configs/A20-OLinuXino-Lime2_defconfig
View file @ c2ae7d82
......@@ -7,8 +7,8 @@ CONFIG_USB0_VBUS_PIN="PC17"
CONFIG_USB0_VBUS_DET="PH5"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/A20-OLinuXino-Lime_defconfig
View file @ c2ae7d82
......@@ -5,8 +5,8 @@ CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/A20-OLinuXino_MICRO_defconfig
View file @ c2ae7d82
......@@ -8,8 +8,8 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=3
CONFIG_VIDEO_VGA=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/A20-Olimex-SOM-EVB_defconfig
View file @ c2ae7d82
......@@ -10,8 +10,8 @@ CONFIG_USB0_VBUS_PIN="PB9"
CONFIG_USB0_VBUS_DET="PH5"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPC(3)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Ampe_A76_defconfig
View file @ c2ae7d82
......@@ -14,8 +14,8 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ampe-a76"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/B4420QDS_NAND_defconfig
View file @ c2ae7d82
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_SF=y
......
configs/B4860QDS_NAND_defconfig
View file @ c2ae7d82
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_SF=y
......
configs/BSC9131RDB_NAND_SYSCLK100_defconfig
View file @ c2ae7d82
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9131RDB=y
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND,SYS_CLK_100"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
......
configs/BSC9131RDB_NAND_defconfig
View file @ c2ae7d82
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9131RDB=y
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
......
configs/BSC9132QDS_NAND_DDRCLK100_defconfig
View file @ c2ae7d82
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_100"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
......
configs/BSC9132QDS_NAND_DDRCLK133_defconfig
View file @ c2ae7d82
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_133"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
......
configs/Bananapi_defconfig
View file @ c2ae7d82
......@@ -6,8 +6,8 @@ CONFIG_VIDEO_COMPOSITE=y
CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Bananapro_defconfig
View file @ c2ae7d82
......@@ -8,8 +8,8 @@ CONFIG_VIDEO_COMPOSITE=y
CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/C29XPCIE_NAND_defconfig
View file @ c2ae7d82
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_C29XPCIE=y
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,NAND"
CONFIG_BOOTDELAY=-1
CONFIG_SPL=y
CONFIG_TPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
......
configs/CHIP_defconfig
View file @ c2ae7d82
......@@ -6,8 +6,8 @@ CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
CONFIG_USB0_VBUS_PIN="PB10"
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip"
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
......
configs/CSQ_CS908_defconfig
View file @ c2ae7d82
......@@ -6,8 +6,8 @@ CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Colombus_defconfig
View file @ c2ae7d82
......@@ -16,8 +16,8 @@ CONFIG_VIDEO_LCD_PANEL_I2C_SCL="PA24"
CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Cubieboard2_defconfig
View file @ c2ae7d82
......@@ -5,8 +5,8 @@ CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Cubieboard_defconfig
View file @ c2ae7d82
......@@ -5,8 +5,8 @@ CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Cubietruck_defconfig
View file @ c2ae7d82
......@@ -10,8 +10,8 @@ CONFIG_VIDEO_VGA=y
CONFIG_GMAC_TX_DELAY=1
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(12)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DFU=y
......
configs/Empire_electronix_d709_defconfig
View file @ c2ae7d82
......@@ -15,8 +15,8 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-d709"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Hummingbird_A31_defconfig
View file @ c2ae7d82
......@@ -8,8 +8,8 @@ CONFIG_VIDEO_VGA_VIA_LCD=y
CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25"
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Itead_Ibox_A20_defconfig
View file @ c2ae7d82
......@@ -5,8 +5,8 @@ CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Lamobo_R1_defconfig
View file @ c2ae7d82
......@@ -6,8 +6,8 @@ CONFIG_MMC0_CD_PIN="PH10"
CONFIG_GMAC_TX_DELAY=4
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI,SATAPWR=SUNXI_GPB(3)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Linksprite_pcDuino3_Nano_defconfig
View file @ c2ae7d82
......@@ -7,8 +7,8 @@ CONFIG_USB1_VBUS_PIN="PH11"
CONFIG_GMAC_TX_DELAY=3
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(2)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Linksprite_pcDuino3_defconfig
View file @ c2ae7d82
......@@ -5,8 +5,8 @@ CONFIG_DRAM_CLK=480
CONFIG_DRAM_ZQ=122
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPH(2)"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Linksprite_pcDuino_defconfig
View file @ c2ae7d82
......@@ -5,8 +5,8 @@ CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/MPC8313ERDB_NAND_33_defconfig
View file @ c2ae7d82
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8313ERDB=y
CONFIG_SPL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ,NAND"
CONFIG_BOOTDELAY=6
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
......
configs/MPC8313ERDB_NAND_66_defconfig
View file @ c2ae7d82
CONFIG_PPC=y
CONFIG_MPC83xx=y
CONFIG_TARGET_MPC8313ERDB=y
CONFIG_SPL=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ,NAND"
CONFIG_BOOTDELAY=6
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
......
configs/Marsboard_A10_defconfig
View file @ c2ae7d82
......@@ -3,8 +3,8 @@ CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN4I=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-marsboard"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,AHCI"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Mele_A1000G_quad_defconfig
View file @ c2ae7d82
......@@ -7,8 +7,8 @@ CONFIG_USB1_VBUS_PIN="PC27"
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Mele_A1000_defconfig
View file @ c2ae7d82
......@@ -5,8 +5,8 @@ CONFIG_VIDEO_VGA=y
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_EMAC,MACPWR=SUNXI_GPH(15),AHCI"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Mele_I7_defconfig
View file @ c2ae7d82
......@@ -6,8 +6,8 @@ CONFIG_USB1_VBUS_PIN="PC27"
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Mele_M3_defconfig
View file @ c2ae7d82
......@@ -8,8 +8,8 @@ CONFIG_VIDEO_VGA=y
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Mele_M5_defconfig
View file @ c2ae7d82
......@@ -7,8 +7,8 @@ CONFIG_MMC0_CD_PIN="PH1"
CONFIG_VIDEO_COMPOSITE=y
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,AHCI,STATUSLED=234"
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
......
configs/Mele_M9_defconfig
View file @ c2ae7d82
......@@ -6,8 +6,8 @@ CONFIG_USB1_VBUS_PIN="PC27"
CONFIG_USB2_VBUS_PIN=""
CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y