Commit c348322a authored by Kumar Gala's avatar Kumar Gala
Browse files

ppc/85xx: Clean up do_reset

There is no reason to do a run time check for e500 v1 based cores to
determine if we have the GUTs RSTCR facility.  Only the first generation
of PQ3 parts (MPC8540/41/55/60) do not have it.  So checking to see if
we are e500 v2 would miss future parts (like e500mc).

Just change this to be ifdef'd based on CONFIG_MPC85{40,41,55,60}.
Signed-off-by: default avatarKumar Gala <>
parent 21170c80
......@@ -153,27 +153,15 @@ int checkcpu (void)
int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
uint pvr;
uint ver;
/* Everything after the first generation of PQ3 parts has RSTCR */
#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
defined(CONFIG_MPC8555) || defined(CONFIG_MPC8560)
unsigned long val, msr;
pvr = get_pvr();
ver = PVR_VER(pvr);
if (ver & 1){
/* e500 v2 core has reset control register */
volatile unsigned int * rstcr;
rstcr = (volatile unsigned int *)(CONFIG_SYS_IMMR + 0xE00B0);
*rstcr = 0x2; /* HRESET_REQ */
* Fallthrough if the code above failed
* Initiate hard reset in debug control register DBCR0
* Make sure MSR[DE] = 1
* Make sure MSR[DE] = 1. This only resets the core.
msr = mfmsr ();
msr |= MSR_DE;
mtmsr (msr);
......@@ -181,6 +169,11 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
val = mfspr(DBCR0);
val |= 0x70000000;
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
out_be32(&gur->rstcr, 0x2); /* HRESET_REQ */
return 1;
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