Commit c3d6a357 authored by Nobuhiro Iwamatsu's avatar Nobuhiro Iwamatsu Committed by Nobuhiro Iwamatsu
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serial: sh: Add support Renesas SH73A0



The serial device of SH73A0 has the same structure as SH7372 of SH, etc.
Signed-off-by: default avatarNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: default avatarNobuhiro Iwamatsu <iwamatsu@nigauri.org>
parent d1858572
...@@ -45,7 +45,8 @@ struct uart_port { ...@@ -45,7 +45,8 @@ struct uart_port {
defined(CONFIG_CPU_SH7721) || \ defined(CONFIG_CPU_SH7721) || \
defined(CONFIG_ARCH_SH7367) || \ defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) || \ defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_ARCH_SH7372) defined(CONFIG_ARCH_SH7372) || \
defined(CONFIG_SH73A0)
# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
# define PORT_PTCR 0xA405011EUL # define PORT_PTCR 0xA405011EUL
# define PORT_PVCR 0xA4050122UL # define PORT_PVCR 0xA4050122UL
...@@ -282,7 +283,8 @@ struct uart_port { ...@@ -282,7 +283,8 @@ struct uart_port {
defined(CONFIG_CPU_SH7721) || \ defined(CONFIG_CPU_SH7721) || \
defined(CONFIG_ARCH_SH7367) || \ defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) || \ defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_ARCH_SH7372) defined(CONFIG_ARCH_SH7372) || \
defined(CONFIG_SH73A0)
# define SCIF_ORER 0x0200 # define SCIF_ORER 0x0200
# define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) # define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER)
# define SCIF_RFDC_MASK 0x007f # define SCIF_RFDC_MASK 0x007f
...@@ -326,7 +328,8 @@ struct uart_port { ...@@ -326,7 +328,8 @@ struct uart_port {
defined(CONFIG_CPU_SH7721) || \ defined(CONFIG_CPU_SH7721) || \
defined(CONFIG_ARCH_SH7367) || \ defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) || \ defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_ARCH_SH7372) defined(CONFIG_ARCH_SH7372) || \
defined(CONFIG_SH73A0)
# define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc) # define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc)
# define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73) # define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73)
# define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf) # define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf)
...@@ -420,7 +423,8 @@ static inline void sci_##name##_out(struct uart_port *port,\ ...@@ -420,7 +423,8 @@ static inline void sci_##name##_out(struct uart_port *port,\
#if defined(CONFIG_SH3) || \ #if defined(CONFIG_SH3) || \
defined(CONFIG_ARCH_SH7367) || \ defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) || \ defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_ARCH_SH7372) defined(CONFIG_ARCH_SH7372) || \
defined(CONFIG_SH73A0)
#if defined(CONFIG_CPU_SH7710) || defined(CONFIG_CPU_SH7712) #if defined(CONFIG_CPU_SH7710) || defined(CONFIG_CPU_SH7712)
#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size,\ #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size,\
sh4_sci_offset, sh4_sci_size, \ sh4_sci_offset, sh4_sci_size, \
...@@ -436,7 +440,8 @@ static inline void sci_##name##_out(struct uart_port *port,\ ...@@ -436,7 +440,8 @@ static inline void sci_##name##_out(struct uart_port *port,\
defined(CONFIG_CPU_SH7720) || \ defined(CONFIG_CPU_SH7720) || \
defined(CONFIG_CPU_SH7721) || \ defined(CONFIG_CPU_SH7721) || \
defined(CONFIG_ARCH_SH7367) || \ defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_SH73A0)
#define SCIF_FNS(name, scif_offset, scif_size) \ #define SCIF_FNS(name, scif_offset, scif_size) \
CPU_SCIF_FNS(name, scif_offset, scif_size) CPU_SCIF_FNS(name, scif_offset, scif_size)
#elif defined(CONFIG_ARCH_SH7372) #elif defined(CONFIG_ARCH_SH7372)
...@@ -492,7 +497,8 @@ static inline void sci_##name##_out(struct uart_port *port,\ ...@@ -492,7 +497,8 @@ static inline void sci_##name##_out(struct uart_port *port,\
defined(CONFIG_CPU_SH7720) || \ defined(CONFIG_CPU_SH7720) || \
defined(CONFIG_CPU_SH7721) || \ defined(CONFIG_CPU_SH7721) || \
defined(CONFIG_ARCH_SH7367) || \ defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_SH73A0)
SCIF_FNS(SCSMR, 0x00, 16) SCIF_FNS(SCSMR, 0x00, 16)
SCIF_FNS(SCBRR, 0x04, 8) SCIF_FNS(SCBRR, 0x04, 8)
...@@ -692,7 +698,8 @@ static inline int sci_rxd_in(struct uart_port *port) ...@@ -692,7 +698,8 @@ static inline int sci_rxd_in(struct uart_port *port)
defined(CONFIG_CPU_SH7721) || \ defined(CONFIG_CPU_SH7721) || \
defined(CONFIG_ARCH_SH7367) || \ defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) || \ defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_ARCH_SH7372) defined(CONFIG_ARCH_SH7372) || \
defined(CONFIG_SH73A0)
#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
#elif defined(CONFIG_CPU_SH7723) ||\ #elif defined(CONFIG_CPU_SH7723) ||\
defined(CONFIG_CPU_SH7724) defined(CONFIG_CPU_SH7724)
......
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