Commit c655fad0 authored by Nobuhiro Iwamatsu's avatar Nobuhiro Iwamatsu
Browse files

sh: Renesas RSK+ 7203 board support



This adds initial support for the RTE RSK+ SH7203 board.
Signed-off-by: default avatarNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: default avatarNobuhiro Iwamatsu <iwamatsu@nigauri.org>
parent 6ede753d
......@@ -753,12 +753,14 @@ Yusuke Goda <goda.yusuke@renesas.com>
MIGO-R SH7722
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
<iwamatsu.nobuhiro@renesas.com>
MS7750SE SH7750
MS7722SE SH7722
R7780MP SH7780
R2DPlus SH7751R
SH7763RDP SH7763
RSK7203 SH7203
Mark Jonas <mark.jonas@de.bosch.com>
......
......@@ -740,6 +740,9 @@ LIST_blackfin=" \
## SH Systems
#########################################################################
LIST_sh2=" \
rsk7203 \
"
LIST_sh3=" \
mpr2 \
ms7720se \
......
......@@ -3005,6 +3005,14 @@ mimc200_config : unconfig
# SH3 (SuperH)
#========================================================================
#########################################################################
## sh2 (Renesas SuperH)
#########################################################################
rsk7203_config: unconfig
@ >include/config.h
@echo "#define CONFIG_RSK7203 1" >> include/config.h
@./mkconfig -a $(@:_config=) sh sh2 rsk7203
#########################################################################
## sh3 (Renesas SuperH)
#########################################################################
......
#
# Copyright (C) 2007,2008 Nobuhiro Iwamatsu
# Copyright (C) 2008 Renesas Solutions Corp.
#
# u-boot/board/rsk7203/Makefile
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS := rsk7203.o
SOBJS := lowlevel_init.o
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
#
# Copyright (C) 2007,2008 Nobuhiro Iwamatsu
# Copyright (C) 2008 Renesas Solutions Corp.
#
# u-boot/board/rsk7203/config.mk
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# TEXT_BASE refers to image _after_ relocation.
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
TEXT_BASE = 0x0C7C0000
/*
* Copyright (C) 2008 Nobuhiro Iwamatsu
* Copyright (C) 2008 Renesas Solutions Corp.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
#include <asm/processor.h>
.global lowlevel_init
.text
.align 2
lowlevel_init:
/* Cache setting */
mov.l CCR1_A ,r1
mov.l CCR1_D ,r0
mov.l r0,@r1
/* ConfigurePortPins */
mov.l PECRL3_A, r1
mov.l PECRL3_D, r0
mov.w r0,@r1
mov.l PCCRL4_A, r1
mov.l PCCRL4_D0, r0
mov.w r0,@r1
mov.l PECRL4_A, r1
mov.l PECRL4_D0, r0
mov.w r0,@r1
mov.l PEIORL_A, r1
mov.l PEIORL_D0, r0
mov.w r0,@r1
mov.l PCIORL_A, r1
mov.l PCIORL_D, r0
mov.w r0,@r1
mov.l PFCRH2_A, r1
mov.l PFCRH2_D, r0
mov.w r0,@r1
mov.l PFCRH3_A, r1
mov.l PFCRH3_D, r0
mov.w r0,@r1
mov.l PFCRH1_A, r1
mov.l PFCRH1_D, r0
mov.w r0,@r1
mov.l PFIORH_A, r1
mov.l PFIORH_D, r0
mov.w r0,@r1
mov.l PECRL1_A, r1
mov.l PECRL1_D0, r0
mov.w r0,@r1
mov.l PEIORL_A, r1
mov.l PEIORL_D1, r0
mov.w r0,@r1
/* Configure Operating Frequency */
mov.l WTCSR_A ,r1
mov.l WTCSR_D0 ,r0
mov.w r0,@r1
mov.l WTCSR_A ,r1
mov.l WTCSR_D1 ,r0
mov.w r0,@r1
mov.l WTCNT_A ,r1
mov.l WTCNT_D ,r0
mov.w r0,@r1
/* Set clock mode*/
mov.l FRQCR_A,r1
mov.l FRQCR_D,r0
mov.w r0,@r1
/* Configure Bus And Memory */
init_bsc_cs0:
mov.l PCCRL4_A,r1
mov.l PCCRL4_D1,r0
mov.w r0,@r1
mov.l PECRL1_A,r1
mov.l PECRL1_D1,r0
mov.w r0,@r1
mov.l CMNCR_A,r1
mov.l CMNCR_D,r0
mov.l r0,@r1
mov.l SC0BCR_A,r1
mov.l SC0BCR_D,r0
mov.l r0,@r1
mov.l CS0WCR_A,r1
mov.l CS0WCR_D,r0
mov.l r0,@r1
init_bsc_cs1:
mov.l PECRL4_A,r1
mov.l PECRL4_D1,r0
mov.w r0,@r1
mov.l CS1WCR_A,r1
mov.l CS1WCR_D,r0
mov.l r0,@r1
init_sdram:
mov.l PCCRL2_A,r1
mov.l PCCRL2_D,r0
mov.w r0,@r1
mov.l PCCRL4_A,r1
mov.l PCCRL4_D2,r0
mov.w r0,@r1
mov.l PCCRL1_A,r1
mov.l PCCRL1_D,r0
mov.w r0,@r1
mov.l PCCRL3_A,r1
mov.l PCCRL3_D,r0
mov.w r0,@r1
mov.l CS3BCR_A,r1
mov.l CS3BCR_D,r0
mov.l r0,@r1
mov.l CS3WCR_A,r1
mov.l CS3WCR_D,r0
mov.l r0,@r1
mov.l SDCR_A,r1
mov.l SDCR_D,r0
mov.l r0,@r1
mov.l RTCOR_A,r1
mov.l RTCOR_D,r0
mov.l r0,@r1
mov.l RTCSR_A,r1
mov.l RTCSR_D,r0
mov.l r0,@r1
/* wait 200us */
mov.l REPEAT_D,r3
mov #0,r2
repeat0:
add #1,r2
cmp/hs r3,r2
bf repeat0
nop
mov.l SDRAM_MODE, r1
mov #0,r0
mov.l r0, @r1
nop
rts
.align 4
CCR1_A: .long CCR1
CCR1_D: .long 0x0000090B
PCCRL4_A: .long 0xFFFE3910
PCCRL4_D0: .long 0x00000000
PECRL4_A: .long 0xFFFE3A10
PECRL4_D0: .long 0x00000000
PECRL3_A: .long 0xFFFE3A12
PECRL3_D: .long 0x00000000
PEIORL_A: .long 0xFFFE3A06
PEIORL_D0: .long 0x00001C00
PEIORL_D1: .long 0x00001C02
PCIORL_A: .long 0xFFFE3906
PCIORL_D: .long 0x00004000
PFCRH2_A: .long 0xFFFE3A8C
PFCRH2_D: .long 0x00000000
PFCRH3_A: .long 0xFFFE3A8A
PFCRH3_D: .long 0x00000000
PFCRH1_A: .long 0xFFFE3A8E
PFCRH1_D: .long 0x00000000
PFIORH_A: .long 0xFFFE3A84
PFIORH_D: .long 0x00000729
PECRL1_A: .long 0xFFFE3A16
PECRL1_D0: .long 0x00000033
WTCSR_A: .long 0xFFFE0000
WTCSR_D0: .long 0x0000A518
WTCSR_D1: .long 0x0000A51D
WTCNT_A: .long 0xFFFE0002
WTCNT_D: .long 0x00005A84
FRQCR_A: .long 0xFFFE0010
FRQCR_D: .long 0x00000104
PCCRL4_D1: .long 0x00000010
PECRL1_D1: .long 0x00000133
CMNCR_A: .long 0xFFFC0000
CMNCR_D: .long 0x00001810
SC0BCR_A: .long 0xFFFC0004
SC0BCR_D: .long 0x10000400
CS0WCR_A: .long 0xFFFC0028
CS0WCR_D: .long 0x00000B41
PECRL4_D1: .long 0x00000100
CS1WCR_A: .long 0xFFFC002C
CS1WCR_D: .long 0x00000B01
PCCRL4_D2: .long 0x00000011
PCCRL3_A: .long 0xFFFE3912
PCCRL3_D: .long 0x00000011
PCCRL2_A: .long 0xFFFE3914
PCCRL2_D: .long 0x00001111
PCCRL1_A: .long 0xFFFE3916
PCCRL1_D: .long 0x00001010
PDCRL4_A: .long 0xFFFE3990
PDCRL4_D: .long 0x00000011
PDCRL3_A: .long 0xFFFE3992
PDCRL3_D: .long 0x00000011
PDCRL2_A: .long 0xFFFE3994
PDCRL2_D: .long 0x00001111
PDCRL1_A: .long 0xFFFE3996
PDCRL1_D: .long 0x00001000
CS3BCR_A: .long 0xFFFC0010
CS3BCR_D: .long 0x00004400
CS3WCR_A: .long 0xFFFC0034
CS3WCR_D: .long 0x00002892
SDCR_A: .long 0xFFFC004C
SDCR_D: .long 0x00000809
RTCOR_A: .long 0xFFFC0058
RTCOR_D: .long 0xA55A0041
RTCSR_A: .long 0xFFFC0050
RTCSR_D: .long 0xa55a0010
STBCR3_A: .long 0xFFFE0408
STBCR3_D: .long 0x00000000
STBCR4_A: .long 0xFFFE040C
STBCR4_D: .long 0x00000008
STBCR5_A: .long 0xFFFE0410
STBCR5_D: .long 0x00000000
STBCR6_A: .long 0xFFFE0414
STBCR6_D: .long 0x00000002
SDRAM_MODE: .long 0xFFFC5040
REPEAT_D: .long 0x00009C40
/*
* Copyright (C) 2008 Nobuhiro Iwamatsu
* Copyright (C) 2008 Renesas Solutions Corp.
*
* u-boot/board/rsk7203/rsk7203.c
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/processor.h>
int checkboard(void)
{
puts("BOARD: Renesas Technology RSK7203\n");
return 0;
}
int board_init(void)
{
return 0;
}
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CFG_SDRAM_BASE;
gd->bd->bi_memsize = CFG_SDRAM_SIZE;
printf("DRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024));
return 0;
}
void led_set_state(unsigned short value)
{
}
/*
* Copyright (C) 2008 Nobuhiro Iwamatsu
* Copyright (C) 2008 Renesas Solutions Corp.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
OUTPUT_ARCH(sh)
ENTRY(_start)
SECTIONS
{
/*
* Base address of internal SDRAM is 0x0C000000.
*
* NOTE: This address must match with the definition of
*TEXT_BASE in config.mk (in this directory).
*/
. = 0x0C000000 + (8*1024*1024) - (256*1024);
PROVIDE (reloc_dst = .);
PROVIDE (_ftext = .);
PROVIDE (_fcode = .);
PROVIDE (_start = .);
.text :
{
cpu/sh2/start.o (.text)
. = ALIGN(8192);
common/environment.o (.ppcenv)
. = ALIGN(8192);
common/environment.o (.ppcenvr)
. = ALIGN(8192);
*(.text)
. = ALIGN(4);
} =0xFF
PROVIDE (_ecode = .);
.rodata :
{
*(.rodata)
. = ALIGN(4);
}
PROVIDE (_etext = .);
PROVIDE (_fdata = .);
.data :
{
*(.data)
. = ALIGN(4);
}
PROVIDE (_edata = .);
PROVIDE (_fgot = .);
.got :
{
*(.got)
. = ALIGN(4);
}
PROVIDE (_egot = .);
PROVIDE (__u_boot_cmd_start = .);
.u_boot_cmd :
{
*(.u_boot_cmd)
. = ALIGN(4);
}
PROVIDE (__u_boot_cmd_end = .);
PROVIDE (reloc_dst_end = .);
PROVIDE (bss_start = .);
PROVIDE (__bss_start = .);
.bss :
{
*(.bss)
. = ALIGN(4);
}
PROVIDE (bss_end = .);
PROVIDE (_end = .);
}
/*
* Configuation settings for the Renesas Technology RSK 7203
*
* Copyright (C) 2008 Nobuhiro Iwamatsu
* Copyright (C) 2008 Renesas Solutions Corp.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __RSK7203_H
#define __RSK7203_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH2 1
#define CONFIG_SH2A 1
#define CONFIG_CPU_SH7203 1
#define CONFIG_RSK7203 1
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_ENV
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_CACHE
#define CONFIG_BAUDRATE 115200
#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */
#define CONFIG_VERSION_VARIABLE
#undef CONFIG_SHOW_BOOT_PROGRESS
/* MEMORY */
#define RSK7203_SDRAM_BASE 0x0C000000
#define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */
#define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024)
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#define CFG_CBSIZE 256 /* Buffer size for input from the Console */
#define CFG_PBSIZE 256 /* Buffer size for Console output */
#define CFG_MAXARGS 16 /* max args accepted for monitor commands */
/* Buffer size for Boot Arguments passed to kernel */
#define CFG_BARGSIZE 512
/* List of legal baudrate settings for this board */
#define CFG_BAUDRATE_TABLE { 115200 }
/* SCIF */
#define CFG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF0 1
#define CFG_MEMTEST_START RSK7203_SDRAM_BASE
#define CFG_MEMTEST_END (CFG_MEMTEST_START + (3 * 1024 * 1024))
#define CFG_SDRAM_BASE RSK7203_SDRAM_BASE
#define CFG_SDRAM_SIZE (32 * 1024 * 1024)
#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 1024 * 1024)
#define CFG_MONITOR_BASE RSK7203_FLASH_BASE_1
#define CFG_MONITOR_LEN (128 * 1024)
#define CFG_MALLOC_LEN (256 * 1024)
#define CFG_GBL_DATA_SIZE 256
#define CFG_BOOTMAPSZ (8 * 1024 * 1024)
/* FLASH */
#define CFG_FLASH_CFI
#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
#define CFG_FLASH_CFI_DRIVER
#undef CFG_FLASH_QUIET_TEST
#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
#define CFG_FLASH_BASE RSK7203_FLASH_BASE_1
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
#define CFG_MAX_FLASH_SECT 64
#define CFG_MAX_FLASH_BANKS 1
#define CFG_ENV_IS_IN_FLASH
#def