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Librem5
uboot-imx
Commits
c733c18e
Commit
c733c18e
authored
Aug 26, 2016
by
Tom Rini
Browse files
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Plain Diff
Merge branch 'master' of
git://www.denx.de/git/u-boot-marvell
parents
4832c7f5
bdf58c73
Changes
12
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12 changed files
with
39 additions
and
43 deletions
+39
-43
arch/arm/mach-mvebu/cpu.c
arch/arm/mach-mvebu/cpu.c
+8
-1
arch/arm/mach-mvebu/include/mach/soc.h
arch/arm/mach-mvebu/include/mach/soc.h
+2
-0
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
+1
-1
arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
+20
-19
include/configs/clearfog.h
include/configs/clearfog.h
+0
-2
include/configs/db-88f6720.h
include/configs/db-88f6720.h
+0
-2
include/configs/db-88f6820-gp.h
include/configs/db-88f6820-gp.h
+0
-2
include/configs/db-mv784mp-gp.h
include/configs/db-mv784mp-gp.h
+0
-2
include/configs/ds414.h
include/configs/ds414.h
+0
-2
include/configs/maxbcm.h
include/configs/maxbcm.h
+0
-2
include/configs/theadorable.h
include/configs/theadorable.h
+0
-2
tools/kwboot.c
tools/kwboot.c
+8
-8
No files found.
arch/arm/mach-mvebu/cpu.c
View file @
c733c18e
...
...
@@ -452,8 +452,15 @@ int arch_cpu_init(void)
u32
mvebu_get_nand_clock
(
void
)
{
u32
reg
;
if
(
mvebu_soc_family
()
==
MVEBU_SOC_A38X
)
reg
=
MVEBU_DFX_DIV_CLK_CTRL
(
1
);
else
reg
=
MVEBU_CORE_DIV_CLK_CTRL
(
1
);
return
CONFIG_SYS_MVEBU_PLL_CLOCK
/
((
readl
(
MVEBU_CORE_DIV_CLK_CTRL
(
1
)
)
&
((
readl
(
reg
)
&
NAND_ECC_DIVCKL_RATIO_MASK
)
>>
NAND_ECC_DIVCKL_RATIO_OFFS
);
}
...
...
arch/arm/mach-mvebu/include/mach/soc.h
View file @
c733c18e
...
...
@@ -73,6 +73,7 @@
#define MVEBU_NAND_BASE (MVEBU_REGISTER(0xd0000))
#define MVEBU_SDIO_BASE (MVEBU_REGISTER(0xd8000))
#define MVEBU_LCD_BASE (MVEBU_REGISTER(0xe0000))
#define MVEBU_DFX_BASE (MVEBU_REGISTER(0xe4000))
#define SOC_COHERENCY_FABRIC_CTRL_REG (MVEBU_REGISTER(0x20200))
#define MBUS_ERR_PROP_EN (1 << 8)
...
...
@@ -92,6 +93,7 @@
#define SPI_PUP_EN BIT(5)
#define MVEBU_CORE_DIV_CLK_CTRL(i) (MVEBU_CLOCK_BASE + ((i) * 0x8))
#define MVEBU_DFX_DIV_CLK_CTRL(i) (MVEBU_DFX_BASE + 0x250 + ((i) * 0x4))
#define NAND_ECC_DIVCKL_RATIO_OFFS 8
#define NAND_ECC_DIVCKL_RATIO_MASK (0x3F << NAND_ECC_DIVCKL_RATIO_OFFS)
...
...
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
View file @
c733c18e
...
...
@@ -184,7 +184,7 @@ int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
DEBUG_INIT_S
(
"PCIe, Idx "
);
DEBUG_INIT_D
(
pex_idx
,
1
);
DEBUG_INIT_S
(
": Link upgraded to Gen2 based on client cpabilities
\n
"
);
(
": Link upgraded to Gen2 based on client c
a
pabilities
\n
"
);
}
/* Update pex DEVICE ID */
...
...
arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
View file @
c733c18e
...
...
@@ -835,25 +835,26 @@ u32 hws_serdes_topology_verify(enum serdes_type serdes_type, u32 serdes_id,
}
}
else
{
test_result
=
SERDES_ALREADY_IN_USE
;
if
(
test_result
==
SERDES_ALREADY_IN_USE
)
{
printf
(
"%s: Error: serdes lane %d is configured to type %s: type already in use
\n
"
,
__func__
,
serdes_id
,
serdes_type_to_string
[
serdes_type
]);
return
MV_FAIL
;
}
else
if
(
test_result
==
WRONG_NUMBER_OF_UNITS
)
{
printf
(
"%s: Warning: serdes lane %d is set to type %s.
\n
"
,
__func__
,
serdes_id
,
serdes_type_to_string
[
serdes_type
]);
printf
(
"%s: Maximum supported lanes are already set to this type (limit = %d)
\n
"
,
__func__
,
serd_max_num
);
return
MV_FAIL
;
}
else
if
(
test_result
==
UNIT_NUMBER_VIOLATION
)
{
printf
(
"%s: Warning: serdes lane %d type is %s: current device support only %d units of this type.
\n
"
,
__func__
,
serdes_id
,
serdes_type_to_string
[
serdes_type
],
serd_max_num
);
return
MV_FAIL
;
}
}
if
(
test_result
==
SERDES_ALREADY_IN_USE
)
{
printf
(
"%s: Error: serdes lane %d is configured to type %s: type already in use
\n
"
,
__func__
,
serdes_id
,
serdes_type_to_string
[
serdes_type
]);
return
MV_FAIL
;
}
else
if
(
test_result
==
WRONG_NUMBER_OF_UNITS
)
{
printf
(
"%s: Warning: serdes lane %d is set to type %s.
\n
"
,
__func__
,
serdes_id
,
serdes_type_to_string
[
serdes_type
]);
printf
(
"%s: Maximum supported lanes are already set to this type (limit = %d)
\n
"
,
__func__
,
serd_max_num
);
return
MV_FAIL
;
}
else
if
(
test_result
==
UNIT_NUMBER_VIOLATION
)
{
printf
(
"%s: Warning: serdes lane %d type is %s: current device support only %d units of this type.
\n
"
,
__func__
,
serdes_id
,
serdes_type_to_string
[
serdes_type
],
serd_max_num
);
return
MV_FAIL
;
}
return
MV_OK
;
...
...
include/configs/clearfog.h
View file @
c733c18e
...
...
@@ -133,8 +133,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_BUS 0
#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif
...
...
include/configs/db-88f6720.h
View file @
c733c18e
...
...
@@ -100,8 +100,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_BUS 0
#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
...
...
include/configs/db-88f6820-gp.h
View file @
c733c18e
...
...
@@ -134,8 +134,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_BUS 0
#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif
...
...
include/configs/db-mv784mp-gp.h
View file @
c733c18e
...
...
@@ -125,8 +125,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_BUS 0
#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
...
...
include/configs/ds414.h
View file @
c733c18e
...
...
@@ -132,8 +132,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_BUS 0
#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
/* DS414 bus width is 32bits */
...
...
include/configs/maxbcm.h
View file @
c733c18e
...
...
@@ -93,8 +93,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_BUS 0
#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
...
...
include/configs/theadorable.h
View file @
c733c18e
...
...
@@ -158,8 +158,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_BUS 0
#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1a000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
...
...
tools/kwboot.c
View file @
c733c18e
...
...
@@ -655,14 +655,6 @@ kwboot_img_patch_hdr(void *img, size_t size)
hdr
->
blockid
=
IBR_HDR_UART_ID
;
/*
* Subtract mkimage header size from destination address
* as this header is not expected by the Marvell BootROM.
* This way, the execution address is identical to the
* one the image is compiled for (TEXT_BASE).
*/
hdr
->
destaddr
=
hdr
->
destaddr
-
sizeof
(
struct
image_header
);
if
(
image_ver
==
0
)
{
struct
main_hdr_v0
*
hdr_v0
=
img
;
...
...
@@ -672,6 +664,14 @@ kwboot_img_patch_hdr(void *img, size_t size)
hdr_v0
->
srcaddr
=
hdr_v0
->
ext
?
sizeof
(
struct
kwb_header
)
:
sizeof
(
*
hdr_v0
);
}
else
{
/*
* Subtract mkimage header size from destination address
* as this header is not expected by the Marvell BootROM.
* This way, the execution address is identical to the
* one the image is compiled for (TEXT_BASE).
*/
hdr
->
destaddr
=
hdr
->
destaddr
-
sizeof
(
struct
image_header
);
}
hdr
->
checksum
=
kwboot_img_csum8
(
hdr
,
hdrsz
)
-
csum
;
...
...
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