Commit d5f60737 authored by Jagan Teki's avatar Jagan Teki

spi: xilinx_spi: Fix to configure CPOL, CPHA mask

priv->mode is initialized when .set_speed triggers
with mode value, so checking mode for configuring
CPOL, CPHA using priv->mode is invalid hence use
mode from .set_speed argument, and at the end
priv->mode will initialized with mode.

This patch also replaces formatting string to use
speed instead of mode in .set_speed ops.
Signed-off-by: default avatarJagan Teki <>
parent 9a4c6e9a
......@@ -247,7 +247,7 @@ static int xilinx_spi_set_speed(struct udevice *bus, uint speed)
priv->freq = speed;
debug("xilinx_spi_set_speed: regs=%p, mode=%d\n", priv->regs,
debug("xilinx_spi_set_speed: regs=%p, speed=%d\n", priv->regs,
return 0;
......@@ -260,13 +260,13 @@ static int xilinx_spi_set_mode(struct udevice *bus, uint mode)
uint32_t spicr;
spicr = readl(&regs->spicr);
if (priv->mode & SPI_LSB_FIRST)
if (mode & SPI_LSB_FIRST)
if (priv->mode & SPI_CPHA)
if (mode & SPI_CPHA)
spicr |= SPICR_CPHA;
if (priv->mode & SPI_CPOL)
if (mode & SPI_CPOL)
spicr |= SPICR_CPOL;
if (priv->mode & SPI_LOOP)
if (mode & SPI_LOOP)
spicr |= SPICR_LOOP;
writel(spicr, &regs->spicr);
Markdown is supported
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment