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Commit daaaf028 authored by Mike Frysinger's avatar Mike Frysinger Committed by Wolfgang Denk
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net: xilinx_enet: drop unused !NET_MULTI driver 



This driver doesn't support the NET_MULTI framework, and I can't find
any boards/configs/files that reference this subdir, so punt it all.
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 5de78b17
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board/xilinx/xilinx_enet/emac_adapter.c deleted 100644 → 0
View file @ 5de78b17
/******************************************************************************
*
* Author: Xilinx, Inc.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
* FITNESS FOR A PARTICULAR PURPOSE.
*
*
* Xilinx hardware products are not intended for use in life support
* appliances, devices, or systems. Use in such applications is
* expressly prohibited.
*
*
* (c) Copyright 2002-2004 Xilinx Inc.
* All rights reserved.
*
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
******************************************************************************/
#include <config.h>
#include <common.h>
#include <net.h>
#include "xemac.h"
#if defined(XPAR_EMAC_0_DEVICE_ID)
/*
* ENET_MAX_MTU and ENET_MAX_MTU_ALIGNED are set from
* PKTSIZE and PKTSIZE_ALIGN (include/net.h)
*/
#define ENET_MAX_MTU PKTSIZE
#define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN
#define ENET_ADDR_LENGTH 6
static XEmac Emac;
static char etherrxbuff[PKTSIZE_ALIGN]; /* Receive buffer */
/* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/
#ifdef CONFIG_ENV_IS_NOWHERE
static u8 EMACAddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 };
#endif
static int initialized = 0;
void
eth_halt(void)
{
if (initialized)
(void) XEmac_Stop(&Emac);
}
int
eth_init(bd_t * bis)
{
u32 Options;
XStatus Result;
uchar enetaddr[6];
#ifdef DEBUG
printf("EMAC Initialization Started\n\r");
#endif
Result = XEmac_Initialize(&Emac, XPAR_EMAC_0_DEVICE_ID);
if (Result != XST_SUCCESS) {
return 0;
}
/* make sure the Emac is stopped before it is started */
(void) XEmac_Stop(&Emac);
if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
#ifdef CONFIG_ENV_IS_NOWHERE
memcpy(enetaddr, EMACAddr, 6);
eth_setenv_enetaddr("ethaddr", enetaddr);
#endif
}
Result = XEmac_SetMacAddress(&Emac, enetaddr);
if (Result != XST_SUCCESS) {
return 0;
}
Options =
(XEM_POLLED_OPTION | XEM_UNICAST_OPTION | XEM_BROADCAST_OPTION |
XEM_FDUPLEX_OPTION | XEM_INSERT_FCS_OPTION |
XEM_INSERT_PAD_OPTION);
Result = XEmac_SetOptions(&Emac, Options);
if (Result != XST_SUCCESS) {
return 0;
}
Result = XEmac_Start(&Emac);
if (Result != XST_SUCCESS) {
return 0;
}
#ifdef DEBUG
printf("EMAC Initialization complete\n\r");
#endif
initialized = 1;
return (0);
}
/*-----------------------------------------------------------------------------+
+-----------------------------------------------------------------------------*/
int
eth_send(volatile void *ptr, int len)
{
XStatus Result;
if (len > ENET_MAX_MTU)
len = ENET_MAX_MTU;
Result = XEmac_PollSend(&Emac, (u8 *) ptr, len);
if (Result == XST_SUCCESS) {
return (1);
} else {
printf("Error while sending frame\n\r");
return (0);
}
}
int
eth_rx(void)
{
u32 RecvFrameLength;
XStatus Result;
RecvFrameLength = PKTSIZE;
Result = XEmac_PollRecv(&Emac, (u8 *) etherrxbuff, &RecvFrameLength);
if (Result == XST_SUCCESS) {
#ifndef CONFIG_EMACLITE
NetReceive((uchar *)etherrxbuff, RecvFrameLength);
#else
NetReceive(etherrxbuff, RecvFrameLength);
#endif
return (1);
} else {
return (0);
}
}
#endif
board/xilinx/xilinx_enet/xemac.c deleted 100644 → 0
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board/xilinx/xilinx_enet/xemac.h deleted 100644 → 0
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board/xilinx/xilinx_enet/xemac_g.c deleted 100644 → 0
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/*******************************************************************
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 6.1.2 EDK_G.14
* DO NOT EDIT.
*
* Author: Xilinx, Inc.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
* FITNESS FOR A PARTICULAR PURPOSE.
*
*
* Xilinx hardware products are not intended for use in life support
* appliances, devices, or systems. Use in such applications is
* expressly prohibited.
*
*
* (c) Copyright 2002-2004 Xilinx Inc.
* All rights reserved.
*
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Description: Driver configuration
*
*******************************************************************/
#include <config.h>
#include "xemac.h"
/*
* The configuration table for devices
*/
XEmac_Config XEmac_ConfigTable[] = {
{
XPAR_OPB_ETHERNET_0_DEVICE_ID,
XPAR_OPB_ETHERNET_0_BASEADDR,
XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST,
XPAR_OPB_ETHERNET_0_DMA_PRESENT,
XPAR_OPB_ETHERNET_0_MII_EXIST}
};
board/xilinx/xilinx_enet/xemac_i.h deleted 100644 → 0
View file @ 5de78b17
/******************************************************************************
*
* Author: Xilinx, Inc.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
* FITNESS FOR A PARTICULAR PURPOSE.
*
*
* Xilinx hardware products are not intended for use in life support
* appliances, devices, or systems. Use in such applications is
* expressly prohibited.
*
*
* (c) Copyright 2002-2004 Xilinx Inc.
* All rights reserved.
*
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xemac_i.h
*
* This header file contains internal identifiers, which are those shared
* between XEmac components. The identifiers in this file are not intended for
* use external to the driver.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ---- -------- -----------------------------------------------
* 1.00a rpm 07/31/01 First release
* 1.00b rpm 02/20/02 Repartitioned files and functions
* 1.00b rpm 04/29/02 Moved register definitions to xemac_l.h
* 1.00c rpm 12/05/02 New version includes support for simple DMA
* </pre>
*
******************************************************************************/
#ifndef XEMAC_I_H /* prevent circular inclusions */
#define XEMAC_I_H /* by using protection macros */
/***************************** Include Files *********************************/
#include "xemac.h"
#include "xemac_l.h"
/************************** Constant Definitions *****************************/
/*
* Default buffer descriptor control word masks. The default send BD control
* is set for incrementing the source address by one for each byte transferred,
* and specify that the destination address (FIFO) is local to the device. The
* default receive BD control is set for incrementing the destination address
* by one for each byte transferred, and specify that the source address is
* local to the device.
*/
#define XEM_DFT_SEND_BD_MASK (XDC_DMACR_SOURCE_INCR_MASK | \
XDC_DMACR_DEST_LOCAL_MASK)
#define XEM_DFT_RECV_BD_MASK (XDC_DMACR_DEST_INCR_MASK | \
XDC_DMACR_SOURCE_LOCAL_MASK)
/*
* Masks for the IPIF Device Interrupt enable and status registers.
*/
#define XEM_IPIF_EMAC_MASK 0x00000004UL /* MAC interrupt */
#define XEM_IPIF_SEND_DMA_MASK 0x00000008UL /* Send DMA interrupt */
#define XEM_IPIF_RECV_DMA_MASK 0x00000010UL /* Receive DMA interrupt */
#define XEM_IPIF_RECV_FIFO_MASK 0x00000020UL /* Receive FIFO interrupt */
#define XEM_IPIF_SEND_FIFO_MASK 0x00000040UL /* Send FIFO interrupt */
/*
* Default IPIF Device Interrupt mask when configured for DMA
*/
#define XEM_IPIF_DMA_DFT_MASK (XEM_IPIF_SEND_DMA_MASK | \
XEM_IPIF_RECV_DMA_MASK | \
XEM_IPIF_EMAC_MASK | \
XEM_IPIF_SEND_FIFO_MASK | \
XEM_IPIF_RECV_FIFO_MASK)
/*
* Default IPIF Device Interrupt mask when configured without DMA
*/
#define XEM_IPIF_FIFO_DFT_MASK (XEM_IPIF_EMAC_MASK | \
XEM_IPIF_SEND_FIFO_MASK | \
XEM_IPIF_RECV_FIFO_MASK)
#define XEM_IPIF_DMA_DEV_INTR_COUNT 7 /* Number of interrupt sources */
#define XEM_IPIF_FIFO_DEV_INTR_COUNT 5 /* Number of interrupt sources */
#define XEM_IPIF_DEVICE_INTR_COUNT 7 /* Number of interrupt sources */
#define XEM_IPIF_IP_INTR_COUNT 22 /* Number of MAC interrupts */
/* a mask for all transmit interrupts, used in polled mode */
#define XEM_EIR_XMIT_ALL_MASK (XEM_EIR_XMIT_DONE_MASK | \
XEM_EIR_XMIT_ERROR_MASK | \
XEM_EIR_XMIT_SFIFO_EMPTY_MASK | \
XEM_EIR_XMIT_LFIFO_FULL_MASK)
/* a mask for all receive interrupts, used in polled mode */
#define XEM_EIR_RECV_ALL_MASK (XEM_EIR_RECV_DONE_MASK | \
XEM_EIR_RECV_ERROR_MASK | \
XEM_EIR_RECV_LFIFO_EMPTY_MASK | \
XEM_EIR_RECV_LFIFO_OVER_MASK | \
XEM_EIR_RECV_LFIFO_UNDER_MASK | \
XEM_EIR_RECV_DFIFO_OVER_MASK | \
XEM_EIR_RECV_MISSED_FRAME_MASK | \
XEM_EIR_RECV_COLLISION_MASK | \
XEM_EIR_RECV_FCS_ERROR_MASK | \
XEM_EIR_RECV_LEN_ERROR_MASK | \
XEM_EIR_RECV_SHORT_ERROR_MASK | \
XEM_EIR_RECV_LONG_ERROR_MASK | \
XEM_EIR_RECV_ALIGN_ERROR_MASK)
/* a default interrupt mask for scatter-gather DMA operation */
#define XEM_EIR_DFT_SG_MASK (XEM_EIR_RECV_ERROR_MASK | \
XEM_EIR_RECV_LFIFO_OVER_MASK | \
XEM_EIR_RECV_LFIFO_UNDER_MASK | \
XEM_EIR_XMIT_SFIFO_OVER_MASK | \
XEM_EIR_XMIT_SFIFO_UNDER_MASK | \
XEM_EIR_XMIT_LFIFO_OVER_MASK | \
XEM_EIR_XMIT_LFIFO_UNDER_MASK | \
XEM_EIR_RECV_DFIFO_OVER_MASK | \
XEM_EIR_RECV_MISSED_FRAME_MASK | \
XEM_EIR_RECV_COLLISION_MASK | \
XEM_EIR_RECV_FCS_ERROR_MASK | \
XEM_EIR_RECV_LEN_ERROR_MASK | \
XEM_EIR_RECV_SHORT_ERROR_MASK | \
XEM_EIR_RECV_LONG_ERROR_MASK | \
XEM_EIR_RECV_ALIGN_ERROR_MASK)
/* a default interrupt mask for non-DMA operation (direct FIFOs) */
#define XEM_EIR_DFT_FIFO_MASK (XEM_EIR_XMIT_DONE_MASK | \
XEM_EIR_RECV_DONE_MASK | \
XEM_EIR_DFT_SG_MASK)
/*
* Mask for the DMA interrupt enable and status registers when configured
* for scatter-gather DMA.
*/
#define XEM_DMA_SG_INTR_MASK (XDC_IXR_DMA_ERROR_MASK | \
XDC_IXR_PKT_THRESHOLD_MASK | \
XDC_IXR_PKT_WAIT_BOUND_MASK | \
XDC_IXR_SG_END_MASK)
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/*****************************************************************************/
/*
*
* Clears a structure of given size, in bytes, by setting each byte to 0.
*
* @param StructPtr is a pointer to the structure to be cleared.
* @param NumBytes is the number of bytes in the structure.
*
* @return
*
* None.
*
* @note
*
* Signature: void XEmac_mClearStruct(u8 *StructPtr, unsigned int NumBytes)
*
******************************************************************************/
#define XEmac_mClearStruct(StructPtr, NumBytes) \
{ \
int i; \
u8 *BytePtr = (u8 *)(StructPtr); \
for (i=0; i < (unsigned int)(NumBytes); i++) \
{ \
*BytePtr++ = 0; \
} \
}
/************************** Variable Definitions *****************************/
extern XEmac_Config XEmac_ConfigTable[];
/************************** Function Prototypes ******************************/
void XEmac_CheckEmacError(XEmac * InstancePtr, u32 IntrStatus);
void XEmac_CheckFifoRecvError(XEmac * InstancePtr);
void XEmac_CheckFifoSendError(XEmac * InstancePtr);
#endif /* end of protection macro */
board/xilinx/xilinx_enet/xemac_intr.c deleted 100644 → 0
View file @ 5de78b17
/******************************************************************************
*
* Author: Xilinx, Inc.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
* FITNESS FOR A PARTICULAR PURPOSE.
*
*
* Xilinx hardware products are not intended for use in life support
* appliances, devices, or systems. Use in such applications is
* expressly prohibited.
*
*
* (c) Copyright 2002-2004 Xilinx Inc.
* All rights reserved.
*
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xemac_intr.c
*
* This file contains general interrupt-related functions of the XEmac driver.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ---- -------- -----------------------------------------------
* 1.00a rpm 07/31/01 First release
* 1.00b rpm 02/20/02 Repartitioned files and functions
* 1.00c rpm 12/05/02 New version includes support for simple DMA
* 1.00c rpm 03/31/03 Added comment to indicate that no Receive Length FIFO
* overrun interrupts occur in v1.00l and later of the EMAC
* device. This avoids the need to reset the device on
* receive overruns.
* </pre>
*
******************************************************************************/
/***************************** Include Files *********************************/
#include "xbasic_types.h"
#include "xemac_i.h"
#include "xio.h"
#include "xipif_v1_23_b.h" /* Uses v1.23b of the IPIF */
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Variable Definitions *****************************/
/************************** Function Prototypes ******************************/
/*****************************************************************************/
/**
*
* Set the callback function for handling asynchronous errors. The upper layer
* software should call this function during initialization.
*
* The error callback is invoked by the driver within interrupt context, so it
* needs to do its job quickly. If there are potentially slow operations within
* the callback, these should be done at task-level.
*
* The Xilinx errors that must be handled by the callback are:
* - XST_DMA_ERROR indicates an unrecoverable DMA error occurred. This is
* typically a bus error or bus timeout. The handler must reset and
* re-configure the device.
* - XST_FIFO_ERROR indicates an unrecoverable FIFO error occurred. This is a
* deadlock condition in the packet FIFO. The handler must reset and
* re-configure the device.
* - XST_RESET_ERROR indicates an unrecoverable MAC error occurred, usually an
* overrun or underrun. The handler must reset and re-configure the device.
* - XST_DMA_SG_NO_LIST indicates an attempt was made to access a scatter-gather
* DMA list that has not yet been created.
* - XST_DMA_SG_LIST_EMPTY indicates the driver tried to get a descriptor from
* the receive descriptor list, but the list was empty.
*
* @param InstancePtr is a pointer to the XEmac instance to be worked on.
* @param CallBackRef is a reference pointer to be passed back to the adapter in
* the callback. This helps the adapter correlate the callback to a
* particular driver.
* @param FuncPtr is the pointer to the callback function.
*
* @return
*
* None.
*
* @note
*
* None.
*
******************************************************************************/
void
XEmac_SetErrorHandler(XEmac * InstancePtr, void *CallBackRef,
XEmac_ErrorHandler FuncPtr)
{
XASSERT_VOID(InstancePtr != NULL);
XASSERT_VOID(FuncPtr != NULL);
XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
InstancePtr->ErrorHandler = FuncPtr;
InstancePtr->ErrorRef = CallBackRef;
}
/****************************************************************************/
/*
*
* Check the interrupt status bits of the Ethernet MAC for errors. Errors
* currently handled are:
* - Receive length FIFO overrun. Indicates data was lost due to the receive
* length FIFO becoming full during the reception of a packet. Only a device
* reset clears this condition.
* - Receive length FIFO underrun. An attempt to read an empty FIFO. Only a
* device reset clears this condition.
* - Transmit status FIFO overrun. Indicates data was lost due to the transmit
* status FIFO becoming full following the transmission of a packet. Only a
* device reset clears this condition.
* - Transmit status FIFO underrun. An attempt to read an empty FIFO. Only a
* device reset clears this condition.
* - Transmit length FIFO overrun. Indicates data was lost due to the transmit
* length FIFO becoming full following the transmission of a packet. Only a
* device reset clears this condition.
* - Transmit length FIFO underrun. An attempt to read an empty FIFO. Only a
* device reset clears this condition.
* - Receive data FIFO overrun. Indicates data was lost due to the receive data
* FIFO becoming full during the reception of a packet.
* - Receive data errors:
* - Receive missed frame error. Valid data was lost by the MAC.
* - Receive collision error. Data was lost by the MAC due to a collision.
* - Receive FCS error. Data was dicarded by the MAC due to FCS error.
* - Receive length field error. Data was dicarded by the MAC due to an invalid
* length field in the packet.
* - Receive short error. Data was dicarded by the MAC because a packet was
* shorter than allowed.
* - Receive long error. Data was dicarded by the MAC because a packet was
* longer than allowed.
* - Receive alignment error. Data was truncated by the MAC because its length
* was not byte-aligned.
*
* @param InstancePtr is a pointer to the XEmac instance to be worked on.
* @param IntrStatus is the contents of the interrupt status register to be checked
*
* @return
*
* None.
*
* @note
*
* This function is intended for internal use only.
*
******************************************************************************/
void
XEmac_CheckEmacError(XEmac * InstancePtr, u32 IntrStatus)
{
u32 ResetError = FALSE;
/*
* First check for receive fifo overrun/underrun errors. Most require a
* reset by the user to clear, but the data FIFO overrun error does not.
*/
if (IntrStatus & XEM_EIR_RECV_DFIFO_OVER_MASK) {
InstancePtr->Stats.RecvOverrunErrors++;
InstancePtr->Stats.FifoErrors++;
}
if (IntrStatus & XEM_EIR_RECV_LFIFO_OVER_MASK) {