Commit de044361 authored by Heiko Schocher's avatar Heiko Schocher Committed by Wolfgang Denk

powerpc: 83xx: add support for the kmeter1 board

This patch adds support for the kmeter1 board from Keymile,
based on a Freescale MPC8360 CPU.

- serial console on UART 1
- 256 MB DDR2 RAM
- 64 MB NOR Flash
- Ethernet RMII Mode over UCC4
- PHY SMSC LAN8700
Signed-off-by: default avatarHeiko Schocher <hs@denx.de>
parent 3feb647f
......@@ -374,6 +374,7 @@ Heiko Schocher <hs@denx.de>
ids8247 MPC8247
jupiter MPC5200
kmeter1 MPC8360
mgcoge MPC8247
mgsuvd MPC852
mucmc52 MPC5200
......
......@@ -335,6 +335,7 @@ LIST_8260=" \
#########################################################################
LIST_83xx=" \
kmeter1 \
MPC8313ERDB_33 \
MPC8313ERDB_NAND_66 \
MPC8315ERDB \
......
......@@ -2186,6 +2186,9 @@ TASREG_config : unconfig
## MPC83xx Systems
#########################################################################
kmeter1_config: unconfig
@$(MKCONFIG) kmeter1 ppc mpc83xx kmeter1 keymile
MPC8313ERDB_33_config \
MPC8313ERDB_66_config \
MPC8313ERDB_NAND_33_config \
......
#
# (C) Copyright 2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS-y += $(BOARD).o
COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
#
# (C) Copyright 2008
# Heiko Schocher, DENX Software Engineering, hs@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
TEXT_BASE = 0xF0000000
/*
* Copyright (C) 2006 Freescale Semiconductor, Inc.
* Dave Liu <daveliu@freescale.com>
*
* Copyright (C) 2007 Logic Product Development, Inc.
* Peter Barada <peterb@logicpd.com>
*
* Copyright (C) 2007 MontaVista Software, Inc.
* Anton Vorontsov <avorontsov@ru.mvista.com>
*
* (C) Copyright 2008
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*/
#include <common.h>
#include <ioports.h>
#include <mpc83xx.h>
#include <i2c.h>
#include <miiphy.h>
#include <asm/io.h>
#include <asm/mmu.h>
#include <pci.h>
#include <libfdt.h>
const qe_iop_conf_t qe_iop_conf_tab[] = {
/* port pin dir open_drain assign */
/* MDIO */
{0, 1, 3, 0, 2}, /* MDIO */
{0, 2, 1, 0, 1}, /* MDC */
/* UCC4 - UEC */
{1, 14, 1, 0, 1}, /* TxD0 */
{1, 15, 1, 0, 1}, /* TxD1 */
{1, 20, 2, 0, 1}, /* RxD0 */
{1, 21, 2, 0, 1}, /* RxD1 */
{1, 18, 1, 0, 1}, /* TX_EN */
{1, 26, 2, 0, 1}, /* RX_DV */
{1, 27, 2, 0, 1}, /* RX_ER */
{1, 24, 2, 0, 1}, /* COL */
{1, 25, 2, 0, 1}, /* CRS */
{2, 15, 2, 0, 1}, /* TX_CLK - CLK16 */
{2, 16, 2, 0, 1}, /* RX_CLK - CLK17 */
/* DUART - UART2 */
{5, 0, 1, 0, 2}, /* UART2_SOUT */
{5, 2, 1, 0, 1}, /* UART2_RTS */
{5, 3, 2, 0, 2}, /* UART2_SIN */
{5, 1, 2, 0, 3}, /* UART2_CTS */
/* END of table */
{0, 0, 0, 0, QE_IOP_TAB_END},
};
int board_early_init_r (void)
{
void *reg = (void *)(CONFIG_SYS_IMMR + 0x14a8);
u32 val;
/*
* Because of errata in the UCCs, we have to write to the reserved
* registers to slow the clocks down.
*/
val = in_be32 (reg);
/* UCC1 */
val |= 0x00003000;
/* UCC2 */
val |= 0x0c000000;
out_be32 (reg, val);
/* enable the PHY on the PIGGY */
setbits (8, (void *)(CONFIG_SYS_PIGGY_BASE + 0x10003), 0x01);
return 0;
}
int fixed_sdram(void)
{
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
u32 msize = 0;
u32 ddr_size;
u32 ddr_size_log2;
msize = CONFIG_SYS_DDR_SIZE;
for (ddr_size = msize << 20, ddr_size_log2 = 0;
(ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) {
if (ddr_size & 1)
return -1;
}
im->sysconf.ddrlaw[0].ar =
LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS;
im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG;
im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;
im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG;
im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2;
im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2;
im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL;
udelay (200);
im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
return msize;
}
phys_size_t initdram (int board_type)
{
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
extern void ddr_enable_ecc (unsigned int dram_size);
#endif
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
u32 msize = 0;
if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
return -1;
/* DDR SDRAM - Main SODIMM */
im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR;
msize = fixed_sdram ();
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
/*
* Initialize DDR ECC byte
*/
ddr_enable_ecc (msize * 1024 * 1024);
#endif
/* return total bus SDRAM size(bytes) -- DDR */
return (msize * 1024 * 1024);
}
int checkboard (void)
{
puts ("Board: Keymile kmeter1\n");
return 0;
}
#if defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup (void *blob, bd_t *bd)
{
ft_cpu_setup (blob, bd);
}
#endif
Keymile kmeter1 Board
-----------------------------------------
1. Alternative Boot EEPROM
Upon the kmeter1 startup the I2C_1 controller is used to fetch the boot
configuration from a serial EEPROM. During the development and debugging
phase it might be helpful to apply an alternative boot configuration in
a simple way. Therefore it is an alternative boot eeprom on the PIGGY,
which can be activated by setting the "ST" jumper on the PIGGY board.
2. Memory Map
BaseAddr PortSz Size Device
----------- ------ ----- ------
0x0000_0000 64 bit 256MB DDR
0x8000_0000 8 bit 256KB GPIO/PIGGY on CS1
0xa000_0000 8 bit 256MB PAXE on CS3
0xe000_0000 2MB Int Mem Reg Space
0xf000_0000 16 bit 256MB FLASH on CS0
DDR-SDRAM:
The current realization is made with four 16-bits memory devices.
Mounting options have been foreseen for device architectures from
4Mx16 to 512Mx16. The kmeter1 is equipped with four 32Mx16 devices
thus resulting in a total capacity of 256MBytes.
3. Compilation
Assuming you're using BASH shell:
export CROSS_COMPILE=your-cross-compile-prefix
cd u-boot
make distclean
make kmeter1_config
make
4. Downloading and Flashing Images
4.0 Download over serial line using Kermit:
loadb
[Drop to kermit:
^\c
send <u-boot-bin-image>
c
]
Or via tftp:
tftp 10000 u-boot.bin
=> run load
Using FSL UEC0 device
TFTP from server 192.168.1.1; our IP address is 192.168.205.4
Filename '/tftpboot/kmeter1/u-boot.bin'.
Load address: 0x200000
Loading: ##############
done
Bytes transferred = 204204 (31dac hex)
=>
4.1 Reflash U-boot Image using U-boot
=> run update
..... done
Un-Protected 5 sectors
..... done
Erased 5 sectors
Copy to Flash... done
..... done
Protected 5 sectors
Total of 204204 bytes were the same
Saving Environment to Flash...
. done
Un-Protected 1 sectors
. done
Un-Protected 1 sectors
Erasing Flash...
. done
Erased 1 sectors
Writing to Flash... done
. done
Protected 1 sectors
. done
Protected 1 sectors
=>
5. Notes
1) The console baudrate for kmeter1 is 115200bps.
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