Commit e40ac487 authored by Mingkai Hu's avatar Mingkai Hu Committed by Kumar Gala
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On-chip ROM boot: MPC8536DS support



The MPC8536E is capable of booting from the on-chip ROM - boot from
eSDHC and boot from eSPI. When power on, the porcessor excutes the
ROM code to initialize the eSPI/eSDHC controller, and loads the mian
U-Boot image from the memory device that interfaced to the controller,
such as the SDCard or SPI EEPROM, to the target memory, e.g. SDRAM or
L2SRAM, then boot from it.

The memory device should contain a specific data structure with control
word and config word at the fixed address. The config word direct the
process how to config the memory device, and the control word direct
the processor where to find the image on the memory device, or where
copy the main image to. The user can use any method to store the data
structure to the memory device, only if store it on the assigned address.

The on-chip ROM code will map the whole 4GB address space by setting
entry0 in the TLB1, so the main image need to switch to Address space 1
to disable this mapping and map the address space again.

This patch implements loading the mian U-Boot image into L2SRAM, so
the image can configure the system memory by using SPD EEPROM.
Signed-off-by: default avatarMingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 9a1a0aed
......@@ -388,6 +388,8 @@ LIST_85xx=" \
ATUM8548 \
MPC8536DS \
MPC8536DS_NAND \
MPC8536DS_SDCARD \
MPC8536DS_SPIFLASH \
MPC8540ADS \
MPC8540EVAL \
MPC8541CDS \
......
......@@ -2447,6 +2447,8 @@ ATUM8548_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx atum8548
MPC8536DS_NAND_config \
MPC8536DS_SDCARD_config \
MPC8536DS_SPIFLASH_config \
MPC8536DS_36BIT_config \
MPC8536DS_config: unconfig
@$(MKCONFIG) -t $(@:_config=) MPC8536DS ppc mpc85xx mpc8536ds freescale
......
......@@ -30,8 +30,20 @@ LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds
endif
endif
ifeq ($(CONFIG_MK_SDCARD), y)
TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
RESET_VECTOR_ADDRESS = 0xf8fffffc
endif
ifeq ($(CONFIG_MK_SPIFLASH), y)
TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
RESET_VECTOR_ADDRESS = 0xf8fffffc
endif
ifndef TEXT_BASE
TEXT_BASE = 0xeff80000
endif
ifndef RESET_VECTOR_ADDRESS
RESET_VECTOR_ADDRESS = 0xeffffffc
endif
......@@ -37,6 +37,16 @@
#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000
#endif
#ifdef CONFIG_MK_SDCARD
#define CONFIG_RAMBOOT_SDCARD 1
#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000
#endif
#ifdef CONFIG_MK_SPIFLASH
#define CONFIG_RAMBOOT_SPIFLASH 1
#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000
#endif
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
......@@ -236,7 +246,8 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND)
#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \
|| defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
#define CONFIG_SYS_RAMBOOT
#else
#undef CONFIG_SYS_RAMBOOT
......@@ -635,6 +646,10 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
#define CONFIG_ENV_IS_IN_NAND 1
#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
#define CONFIG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
#define CONFIG_ENV_SIZE 0x2000
#endif
#else
#define CONFIG_ENV_IS_IN_FLASH 1
......
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