Commit e69b4b8f authored by wdenk's avatar wdenk
Browse files

Initial revision

parent 0669d4d3
#
# (C) Copyright 2000
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o pci.o misc.o el_srom.o dc_srom.o l2cache.o
SOBJS = asm_init.o
$(LIB): .depend $(OBJS) $(SOBJS)
$(AR) crv $@ $^
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
sinclude .depend
#########################################################################
#
# (C) Copyright 2000
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
TEXT_BASE = 0xFFF00000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
/*
* (C) Copyright 2002 ELTEC Elektronik AG
* Frank Gottschling <fgottschling@eltec.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* SRom I/O routines.
*/
#include <common.h>
#include <pci.h>
#include "srom.h"
#define SROM_RD 0x00004000 /* Read from Boot ROM */
#define SROM_WR 0x00002000 /* Write to Boot ROM */
#define SROM_SR 0x00000800 /* Select Serial ROM when set */
#define DT_IN 0x00000004 /* Serial Data In */
#define DT_CLK 0x00000002 /* Serial ROM Clock */
#define DT_CS 0x00000001 /* Serial ROM Chip Select */
static u_int dc_srom_iobase;
/*----------------------------------------------------------------------------*/
static int inl(u_long addr)
{
return le32_to_cpu(*(volatile u_long *)(addr));
}
/*----------------------------------------------------------------------------*/
static void outl (int command, u_long addr)
{
*(volatile u_long *)(addr) = cpu_to_le32(command);
}
/*----------------------------------------------------------------------------*/
static void sendto_srom(u_int command, u_long addr)
{
outl(command, addr);
udelay(1);
return;
}
/*----------------------------------------------------------------------------*/
static int getfrom_srom(u_long addr)
{
s32 tmp;
tmp = inl(addr);
udelay(1);
return tmp;
}
/*----------------------------------------------------------------------------*/
static void srom_latch (u_int command, u_long addr)
{
sendto_srom (command, addr);
sendto_srom (command | DT_CLK, addr);
sendto_srom (command, addr);
return;
}
/*----------------------------------------------------------------------------*/
static void srom_command_rd (u_int command, u_long addr)
{
srom_latch (command, addr);
srom_latch (command, addr);
srom_latch ((command & 0x0000ff00) | DT_CS, addr);
return;
}
/*----------------------------------------------------------------------------*/
static void srom_command_wr (u_int command, u_long addr)
{
srom_latch (command, addr);
srom_latch ((command & 0x0000ff00) | DT_CS, addr);
srom_latch (command, addr);
return;
}
/*----------------------------------------------------------------------------*/
static void srom_address(u_int command, u_long addr, u_char offset)
{
int i;
signed char a;
a = (char)(offset << 2);
for (i=0; i<6; i++, a <<= 1)
{
srom_latch(command | ((a < 0) ? DT_IN : 0), addr);
}
udelay(1);
i = (getfrom_srom(addr) >> 3) & 0x01;
return;
}
/*----------------------------------------------------------------------------*/
static short srom_data_rd (u_int command, u_long addr)
{
int i;
short word = 0;
s32 tmp;
for (i=0; i<16; i++)
{
sendto_srom(command | DT_CLK, addr);
tmp = getfrom_srom(addr);
sendto_srom(command, addr);
word = (word << 1) | ((tmp >> 3) & 0x01);
}
sendto_srom(command & 0x0000ff00, addr);
return word;
}
/*----------------------------------------------------------------------------*/
static int srom_data_wr (u_int command, u_long addr, short val)
{
int i;
u_long longVal;
s32 tmp;
longVal = (u_long)(le16_to_cpu(val));
for (i=0; i<16; i++)
{
tmp = (longVal & 0x8000)>>13;
sendto_srom (tmp | command, addr);
sendto_srom (tmp | command | DT_CLK, addr);
sendto_srom (tmp | command, addr);
longVal = longVal<<1;
}
sendto_srom(command & 0x0000ff00, addr);
sendto_srom(command, addr);
tmp = 100;
do
{
if ((getfrom_srom(dc_srom_iobase) & 0x8) == 0x8)
break;
udelay(1000);
} while (--tmp);
if (tmp == 0)
{
printf("Write DEC21143 SRom timed out !\n");
return (-1);
}
return 0;
}
/*----------------------------------------------------------------------------*/
static short srom_rd (u_long addr, u_char offset)
{
sendto_srom (SROM_RD | SROM_SR, addr);
srom_latch (SROM_RD | SROM_SR | DT_CS, addr);
srom_command_rd (SROM_RD | SROM_SR | DT_IN | DT_CS, addr);
srom_address (SROM_RD | SROM_SR | DT_CS, addr, offset);
return srom_data_rd (SROM_RD | SROM_SR | DT_CS, addr);
}
/*----------------------------------------------------------------------------*/
static void srom_wr_enable (u_long addr)
{
int i;
sendto_srom (SROM_WR | SROM_SR, addr);
srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
srom_latch (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
for (i=0; i<6; i++)
{
srom_latch (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
}
}
/*----------------------------------------------------------------------------*/
static int srom_wr (u_long addr, u_char offset, short val)
{
srom_wr_enable (addr);
sendto_srom (SROM_WR | SROM_SR, addr);
srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
srom_command_wr (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
srom_address (SROM_WR | SROM_SR | DT_CS, addr, offset);
return srom_data_wr (SROM_WR | SROM_SR | DT_CS, addr, val);
}
/*----------------------------------------------------------------------------*/
/*
* load data from the srom
*/
int dc_srom_load (u_short *dest)
{
int offset;
short tmp;
/* get srom iobase from local network controller */
pci_read_config_dword(PCI_BDF(0,14,0), PCI_BASE_ADDRESS_1, &dc_srom_iobase);
dc_srom_iobase &= PCI_BASE_ADDRESS_MEM_MASK;
dc_srom_iobase = pci_mem_to_phys(PCI_BDF(0,14,0), dc_srom_iobase);
dc_srom_iobase += 0x48; /* io offset for srom access */
memset (dest, 0, 128);
for (offset=0; offset<64; offset++)
{
tmp = srom_rd (dc_srom_iobase, offset);
*dest++ = le16_to_cpu(tmp);
}
return (0);
}
/*----------------------------------------------------------------------------*/
/*
* store data into the srom
*/
int dc_srom_store (u_short *src)
{
int offset;
/* get srom iobase from local network controller */
pci_read_config_dword(PCI_BDF(0,14,0), PCI_BASE_ADDRESS_1, &dc_srom_iobase);
dc_srom_iobase &= PCI_BASE_ADDRESS_MEM_MASK;
dc_srom_iobase = pci_mem_to_phys(PCI_BDF(0,14,0), dc_srom_iobase);
dc_srom_iobase += 0x48; /* io offset for srom access */
for (offset=0; offset<64; offset++)
{
if (srom_wr (dc_srom_iobase, offset, *src) == -1)
return (-1);
src++;
}
return (0);
}
/*----------------------------------------------------------------------------*/
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* 07-10-2002 Frank Gottschling: added 29F032 flash (ELPPC).
* fixed monitor protection part
*
* 09-18-2001 Andreas Heppel: Reduced the code in here to the usage
* of AMD's 29F040 and 29F016 flashes, since the BAB7xx does use
* any other.
*/
#include <common.h>
#include <asm/processor.h>
#include <asm/pci_io.h>
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
ulong flash_get_size (vu_long *addr, flash_info_t *info);
static int write_word (flash_info_t *info, ulong dest, ulong data);
/*flash command address offsets*/
#define ADDR0 (0x555)
#define ADDR1 (0x2AA)
#define ADDR3 (0x001)
#define FLASH_WORD_SIZE unsigned char
/*----------------------------------------------------------------------------*/
unsigned long flash_init (void)
{
unsigned long size1, size2;
int i;
/* Init: no FLASHes known */
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i)
{
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* initialise 1st flash */
size1 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN)
{
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size1, size1<<20);
}
/* initialise 2nd flash */
size2 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
if (flash_info[1].flash_id == FLASH_UNKNOWN)
{
printf ("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
size2, size2<<20);
}
/* monitor protection ON by default */
if (size1 == 512*1024)
{
(void)flash_protect(FLAG_PROTECT_SET,
FLASH_BASE0_PRELIM,
FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
&flash_info[0]);
}
if (size2 == 512*1024)
{
(void)flash_protect(FLAG_PROTECT_SET,
FLASH_BASE1_PRELIM,
FLASH_BASE1_PRELIM+CFG_MONITOR_LEN-1,
&flash_info[1]);
}
if (size2 == 4*1024*1024)
{
(void)flash_protect(FLAG_PROTECT_SET,
CFG_FLASH_BASE,
CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
&flash_info[1]);
}
return (size1 + size2);
}
/*----------------------------------------------------------------------------*/
void flash_print_info (flash_info_t *info)
{
int i;
int k;
int size;
int erased;
volatile unsigned long *flash;
if (info->flash_id == FLASH_UNKNOWN) {
printf ("missing or unknown FLASH type\n");
flash_init();
}
if (info->flash_id == FLASH_UNKNOWN) {
printf ("missing or unknown FLASH type\n");
return;
}
switch (info->flash_id & FLASH_VENDMASK) {
case FLASH_MAN_AMD:
printf ("AMD ");
break;
default:
printf ("Unknown Vendor ");
break;
}
switch (info->flash_id & FLASH_TYPEMASK) {
case AMD_ID_F040B:
printf ("AM29F040B (4 Mbit)\n");
break;
case AMD_ID_F016D:
printf ("AM29F016D (16 Mbit)\n");
break;
case AMD_ID_F032B:
printf ("AM29F032B (32 Mbit)\n");
break;
default:
printf ("Unknown Chip Type\n");
break;
}
if (info->size >= (1 << 20)) {
printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
} else {
printf (" Size: %ld kB in %d Sectors\n", info->size >> 10, info->sector_count);
}
printf (" Sector Start Addresses:");
for (i=0; i<info->sector_count; ++i) {
/*
* Check if whole sector is erased
*/
if (i != (info->sector_count-1))
size = info->start[i+1] - info->start[i];
else
size = info->start[0] + info->size - info->start[i];
erased = 1;
flash = (volatile unsigned long *)info->start[i];
size = size >> 2; /* divide by 4 for longword access */
for (k=0; k<size; k++) {
if (*flash++ != 0xffffffff) {
erased = 0;
break;
}
}
if ((i % 5) == 0)
printf ("\n ");
printf (" %08lX%s%s",
info->start[i],
erased ? " E" : " ",
info->protect[i] ? "RO " : " ");
}
printf ("\n");
}
/*----------------------------------------------------------------------------*/
/*
* The following code cannot be run from FLASH!
*/
ulong flash_get_size (vu_long *addr, flash_info_t *info)
{
short i;
ulong vendor, devid;
ulong base = (ulong)addr;
volatile unsigned char *caddr = (unsigned char *)addr;
#ifdef DEBUG
printf("flash_get_size for address 0x%lx: \n", (unsigned long)caddr);
#endif
/* Write auto select command: read Manufacturer ID */
caddr[0] = 0xF0; /* reset bank */
udelay(10);
eieio();
caddr[0x555] = 0xAA;
udelay(10);
caddr[0x2AA] = 0x55;
udelay(10);
caddr[0x555] = 0x90;
udelay(10);
vendor = caddr[0];
devid = caddr[1];
#ifdef DEBUG
printf("Manufacturer: 0x%lx\n", vendor);
#endif
vendor &= 0xff;
devid &= 0xff;
/* We accept only two AMD types */
switch (vendor) {
case (FLASH_WORD_SIZE)AMD_MANUFACT:
info->flash_id = FLASH_MAN_AMD;
break;
default:
info->flash_id = FLASH_UNKNOWN;
info->sector_count = 0;
info->size = 0;
return (0); /* no or unknown flash */
}
switch (devid) {
case (FLASH_WORD_SIZE)AMD_ID_F040B:
info->flash_id |= AMD_ID_F040B;
info->sector_count = 8;
info->size = 0x00080000;
break; /* => 0.5 MB */
case (FLASH_WORD_SIZE)AMD_ID_F016D:
info->flash_id |= AMD_ID_F016D;
info->sector_count = 32;