Commit e6eecca5 authored by Masahiro Yamada's avatar Masahiro Yamada

ARM: uniphier: unify low-level debug init code

Move init code of low-level debug into a single file.
This is helpful to create an image that runs on multiple SoCs.
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
parent fcbcd597
......@@ -10,6 +10,8 @@ obj-y += spl.o
obj-y += memconf.o
obj-y += ddrphy_training.o
obj-$(CONFIG_DEBUG_LL) += debug_ll.o
else
obj-y += late_lowlevel_init.o
......
/*
* On-chip UART initializaion for low-level debugging
*
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/serial_reg.h>
#include <linux/linkage.h>
#include <mach/bcu-regs.h>
#include <mach/sc-regs.h>
#include <mach/sg-regs.h>
#if !defined(CONFIG_DEBUG_SEMIHOSTING)
#include CONFIG_DEBUG_LL_INCLUDE
#endif
#define BAUDRATE 115200
#define DIV_ROUND(x, d) (((x) + ((d) / 2)) / (d))
ENTRY(debug_ll_init)
ldr r0, =SG_REVISION
ldr r1, [r0]
and r1, r1, #SG_REVISION_TYPE_MASK
mov r1, r1, lsr #SG_REVISION_TYPE_SHIFT
#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
#define PH1_SLD3_UART_CLK 36864000
cmp r1, #0x25
bne ph1_sld3_end
sg_set_pinsel 64, 1, 4, 4, r0, r1 @ TXD0 -> TXD0
ldr r0, =BCSCR5
ldr r1, =0x24440000
str r1, [r0]
ldr r0, =SC_CLKCTRL
ldr r1, [r0]
orr r1, r1, #SC_CLKCTRL_CEN_PERI
str r1, [r0]
ldr r3, =DIV_ROUND(PH1_SLD3_UART_CLK, 16 * BAUDRATE)
b init_uart
ph1_sld3_end:
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
#define PH1_LD4_UART_CLK 36864000
cmp r1, #0x26
bne ph1_ld4_end
ldr r0, =SG_IECTRL
ldr r1, [r0]
orr r1, r1, #1
str r1, [r0]
sg_set_pinsel 88, 1, 8, 4, r0, r1 @ HSDOUT6 -> TXD0
ldr r3, =DIV_ROUND(PH1_LD4_UART_CLK, 16 * BAUDRATE)
b init_uart
ph1_ld4_end:
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
#define PH1_PRO4_UART_CLK 73728000
cmp r1, #0x28
bne ph1_pro4_end
sg_set_pinsel 128, 0, 4, 8, r0, r1 @ TXD0 -> TXD0
ldr r0, =SG_LOADPINCTRL
mov r1, #1
str r1, [r0]
ldr r0, =SC_CLKCTRL
ldr r1, [r0]
orr r1, r1, #SC_CLKCTRL_CEN_PERI
str r1, [r0]
ldr r3, =DIV_ROUND(PH1_PRO4_UART_CLK, 16 * BAUDRATE)
b init_uart
ph1_pro4_end:
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
#define PH1_SLD8_UART_CLK 80000000
cmp r1, #0x29
bne ph1_sld8_end
ldr r0, =SG_IECTRL
ldr r1, [r0]
orr r1, r1, #1
str r1, [r0]
sg_set_pinsel 70, 3, 8, 4, r0, r1 @ HSDOUT0 -> TXD0
ldr r3, =DIV_ROUND(PH1_SLD8_UART_CLK, 16 * BAUDRATE)
b init_uart
ph1_sld8_end:
#endif
init_uart:
addruart r0, r1, r2
mov r1, #UART_LCR_WLEN8 << 8
str r1, [r0, #0x10]
str r3, [r0, #0x24]
mov pc, lr
ENDPROC(debug_ll_init)
/*
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/serial_reg.h>
#if !defined(CONFIG_DEBUG_SEMIHOSTING)
#include CONFIG_DEBUG_LL_INCLUDE
#endif
#define BAUDRATE 115200
#define DIV_ROUND(x, d) (((x) + ((d) / 2)) / (d))
#define DIVISOR DIV_ROUND(UART_CLK, 16 * BAUDRATE)
.macro init_debug_uart, ra, rb, rc
addruart \ra, \rb, \rc
mov \rb, #UART_LCR_WLEN8 << 8
str \rb, [\ra, #0x10]
ldr \rb, =DIVISOR
str \rb, [\ra, #0x24]
.endm
......@@ -27,7 +27,7 @@ ENTRY(lowlevel_init)
mcr p15, 0, r0, c1, c0, 0
#ifdef CONFIG_DEBUG_LL
bl setup_lowlevel_debug
bl debug_ll_init
#endif
/*
......
......@@ -3,7 +3,6 @@
#
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
obj-y += bcu_init.o pll_init.o early_clkrst_init.o \
pll_spectrum.o umc_init.o ddrphy_init.o
obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o
......
/*
* On-chip UART initializaion for low-level debugging
*
* Copyright (C) 2014 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/linkage.h>
#include <mach/sg-regs.h>
#define UART_CLK 36864000
#include <mach/debug-uart.S>
ENTRY(setup_lowlevel_debug)
ldr r0, =SG_IECTRL
ldr r1, [r0]
orr r1, r1, #1
str r1, [r0]
/* UART Port 0 */
sg_set_pinsel 85, 1, 8, 4, r0, r1
sg_set_pinsel 88, 1, 8, 4, r0, r1
init_debug_uart r0, r1, r2
mov pc, lr
ENDPROC(setup_lowlevel_debug)
......@@ -3,7 +3,6 @@
#
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
obj-y += pll_init.o early_clkrst_init.o \
pll_spectrum.o umc_init.o ddrphy_init.o
obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o
......
/*
* On-chip UART initializaion for low-level debugging
*
* Copyright (C) 2014 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/linkage.h>
#include <mach/sc-regs.h>
#include <mach/sg-regs.h>
#define UART_CLK 73728000
#include <mach/debug-uart.S>
ENTRY(setup_lowlevel_debug)
/* UART Port 0 */
sg_set_pinsel 127, 0, 4, 8, r0, r1
sg_set_pinsel 128, 0, 4, 8, r0, r1
ldr r0, =SG_LOADPINCTRL
mov r1, #1
str r1, [r0]
ldr r0, =SC_CLKCTRL
ldr r1, [r0]
orr r1, r1, #SC_CLKCTRL_CEN_PERI
str r1, [r0]
init_debug_uart r0, r1, r2
mov pc, lr
ENDPROC(setup_lowlevel_debug)
......@@ -3,7 +3,6 @@
#
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
obj-y += bcu_init.o memconf.o sg_init.o pll_init.o early_clkrst_init.o \
early_pinctrl.o pll_spectrum.o umc_init.o
obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o
......
/*
* On-chip UART initializaion for low-level debugging
*
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/linkage.h>
#include <mach/bcu-regs.h>
#include <mach/sc-regs.h>
#include <mach/sg-regs.h>
#define UART_CLK 36864000
#include <mach/debug-uart.S>
ENTRY(setup_lowlevel_debug)
sg_set_pinsel 63, 0, 4, 4, r0, r1
sg_set_pinsel 64, 1, 4, 4, r0, r1
ldr r0, =BCSCR5
ldr r1, =0x24440000
str r1, [r0]
ldr r0, =SC_CLKCTRL
ldr r1, [r0]
orr r1, r1, #SC_CLKCTRL_CEN_PERI
str r1, [r0]
init_debug_uart r0, r1, r2
mov pc, lr
ENDPROC(setup_lowlevel_debug)
/*
* On-chip UART initializaion for low-level debugging
*
* Copyright (C) 2014 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/linkage.h>
#include <mach/sg-regs.h>
#define UART_CLK 80000000
#include <mach/debug-uart.S>
ENTRY(setup_lowlevel_debug)
ldr r0, =SG_IECTRL
ldr r1, [r0]
orr r1, r1, #1
str r1, [r0]
/* UART Port 0 */
sg_set_pinsel 70, 3, 8, 4, r0, r1
sg_set_pinsel 71, 3, 8, 4, r0, r1
init_debug_uart r0, r1, r2
mov pc, lr
ENDPROC(setup_lowlevel_debug)
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