Commit ea2f0cb3 authored by Daniel Schwierzeck's avatar Daniel Schwierzeck Committed by Shinya Kuribayashi
Browse files

MIPS: Au1x00: Move all Au1x00 specific code to separate subdirectory



Au1x00 is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.
Signed-off-by: default avatarDaniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Thomas Lange <thomas@corelatus.se>
Signed-off-by: default avatarShinya Kuribayashi <skuribay@pobox.com>
parent 6235df94
......@@ -29,8 +29,6 @@ START = start.o
SOBJS-y = cache.o
COBJS-y = cpu.o interrupts.o
COBJS-$(CONFIG_SOC_AU1X00) += au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o
SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
START := $(addprefix $(obj),$(START))
......
#
# (C) Copyright 2011
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
COBJS = au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
#
# (C) Copyright 2011
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
PLATFORM_CPPFLAGS += -mtune=4kc
......@@ -217,17 +217,17 @@ M5282EVB m68k mcf52x2 m5282evb freesca
M53017EVB m68k mcf52x2 m53017evb freescale
EP2500 m68k mcf52x2 ep2500 Mercury
microblaze-generic microblaze microblaze microblaze-generic xilinx
dbau1000 mips mips32 dbau1x00 - - dbau1x00:DBAU1000
dbau1100 mips mips32 dbau1x00 - - dbau1x00:DBAU1100
dbau1500 mips mips32 dbau1x00 - - dbau1x00:DBAU1500
dbau1550 mips mips32 dbau1x00 - - dbau1x00:DBAU1550
dbau1550_el mips mips32 dbau1x00 - - dbau1x00:DBAU1550
gth2 mips mips32
dbau1000 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1000
dbau1100 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1100
dbau1500 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1500
dbau1550 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550
dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550
gth2 mips mips32 - - au1x00
incaip mips mips32 incaip - incaip
incaip_100MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=100000000
incaip_133MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=133000000
incaip_150MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=150000000
pb1000 mips mips32 pb1x00 - - pb1x00:PB1000
pb1000 mips mips32 pb1x00 - au1x00 pb1x00:PB1000
qemu_mips mips mips32 qemu-mips - - qemu-mips
tb0229 mips mips32
vct_premium mips mips32 vct micronas - vct:VCT_PREMIUM
......
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