Commit ec4c544b authored by wdenk's avatar wdenk
Browse files

Patches by Stephan Linz, 30 Jan 2004:

1: - board/altera/common/flash.c:flash_erase():
     o allow interrupts befor get_timer() call
     o check-up each erased sector and avoid unexpected timeouts
   - board/altera/dk1c20/dk1s10.c:board_early_init_f():
     o enclose sevenseg_set() in cpp condition
   - remove the ASMI configuration for DK1S10_standard_32 (never present)
   - fix some typed in mistakes in the NIOS documentation
2: - split DK1C20 configuration into several header files:
     o two new files for each NIOS CPU description
     o U-Boot related part is remaining in DK1C20.h
3: - split DK1S10 configuration into several header files:
     o two new files for each NIOS CPU description
     o U-Boot related part is remaining in DK1S10.h
4: - Add support for the Microtronix Linux Development Kit
     NIOS CPU configuration at the Altera Nios Development Kit,
     Stratix Edition (DK-1S10)
5: - Add documentation for the Altera Nios Development Kit,
     Stratix Edition (DK-1S10)
6: - Add support for the Nios Serial Peripharel Interface (SPI)
     (master only)
7: - Add support for the common U-Boot SPI framework at
     RTC driver DS1306
parent b98fff1d
......@@ -2,6 +2,30 @@
Changes since U-Boot 1.0.1:
======================================================================
* Patches by Stephan Linz, 30 Jan 2004:
1: - board/altera/common/flash.c:flash_erase():
o allow interrupts befor get_timer() call
o check-up each erased sector and avoid unexpected timeouts
- board/altera/dk1c20/dk1s10.c:board_early_init_f():
o enclose sevenseg_set() in cpp condition
- remove the ASMI configuration for DK1S10_standard_32 (never present)
- fix some typed in mistakes in the NIOS documentation
2: - split DK1C20 configuration into several header files:
o two new files for each NIOS CPU description
o U-Boot related part is remaining in DK1C20.h
3: - split DK1S10 configuration into several header files:
o two new files for each NIOS CPU description
o U-Boot related part is remaining in DK1S10.h
4: - Add support for the Microtronix Linux Development Kit
NIOS CPU configuration at the Altera Nios Development Kit,
Stratix Edition (DK-1S10)
5: - Add documentation for the Altera Nios Development Kit,
Stratix Edition (DK-1S10)
6: - Add support for the Nios Serial Peripharel Interface (SPI)
(master only)
7: - Add support for the common U-Boot SPI framework at
RTC driver DS1306
* Patch by Rahul Shanbhag, 28 Jan 2004:
Fix flash protection/locking handling for OMAP1610 innovator board.
......
......@@ -177,7 +177,7 @@ LIST_x86="${LIST_I486}"
LIST_nios=" \
DK1C20 DK1C20_standard_32 \
DK1S10 DK1S10_standard_32 \
DK1S10 DK1S10_standard_32 DK1S10_mtx_ldk_20 \
"
#-----------------------------------------------------------------------
......
......@@ -1064,6 +1064,7 @@ DK1C20_config: unconfig
DK1S10_safe_32_config \
DK1S10_standard_32_config \
DK1S10_mtx_ldk_20_config \
DK1S10_config: unconfig
@ >include/config.h
@[ -z "$(findstring _safe_32,$@)" ] || \
......@@ -1074,6 +1075,10 @@ DK1S10_config: unconfig
{ echo "#define CONFIG_NIOS_STANDARD_32 1" >>include/config.h ; \
echo "... NIOS 'standard_32' configuration" ; \
}
@[ -z "$(findstring _mtx_ldk_20,$@)" ] || \
{ echo "#define CONFIG_NIOS_MTX_LDK_20 1" >>include/config.h ; \
echo "... NIOS 'mtx_ldk_20' configuration" ; \
}
@[ -z "$(findstring DK1S10_config,$@)" ] || \
{ echo "#define CONFIG_NIOS_STANDARD_32 1" >>include/config.h ; \
echo "... NIOS 'standard_32' configuration (DEFAULT)" ; \
......
......@@ -71,7 +71,6 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
volatile CFG_FLASH_WORD_SIZE *addr2;
int prot, sect;
int any = 0;
unsigned oldpri;
ulong start;
......@@ -94,6 +93,12 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
printf ("\n");
}
#ifdef DEBUG
for (sect = s_first; sect <= s_last; sect++) {
printf("- Erase: Sect: %i @ 0x%08x\n", sect, info->start[sect]);
}
#endif
/* NOTE: disabling interrupts on Nios can be very bad since it
* also disables the LO_LIMIT exception. It's better here to
* set the interrupt priority to 3 & restore it when we're done.
......@@ -114,27 +119,26 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
*addr = 0xaa;
*addr = 0x55;
*addr2 = 0x30;
any = 1;
}
}
/* Now just wait for 0xff & provide some user feedback while
* we wait.
*/
if (any) {
addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
start = get_timer (0);
while (*addr2 != 0xff) {
udelay (1000 * 1000);
putc ('.');
if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
printf ("timeout\n");
return 1;
/* Now just wait for 0xff & provide some user
* feedback while we wait. Here we have to grant
* timer interrupts. Otherwise get_timer() can't
* work right. */
ipri(oldpri);
start = get_timer (0);
while (*addr2 != 0xff) {
udelay (1000 * 1000);
putc ('.');
if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
printf ("timeout\n");
return 1;
}
}
oldpri = ipri (3); /* disallow non important irqs again */
}
printf ("\n");
}
printf ("\n");
/* Restore interrupt priority */
ipri (oldpri);
......
......@@ -33,8 +33,10 @@ void _default_hdlr (void)
int board_early_init_f (void)
{
#if defined(CONFIG_SEVENSEG)
/* init seven segment led display and switch off */
sevenseg_set(SEVENSEG_OFF);
#endif
return 0;
}
......
......@@ -33,14 +33,24 @@ void _default_hdlr (void)
int board_early_init_f (void)
{
#if defined(CONFIG_SEVENSEG)
/* init seven segment led display and switch off */
sevenseg_set(SEVENSEG_OFF);
#endif
return 0;
}
int checkboard (void)
{
puts ("Board: Altera Nios 1S10 Development Kit\n");
#if defined(CONFIG_NIOS_SAFE_32)
puts ("Conf.: Altera Safe 32 (safe_32)\n");
#elif defined(CONFIG_NIOS_STANDARD_32)
puts ("Conf.: Altera Standard 32 (standard_32)\n");
#elif defined(CONFIG_NIOS_MTX_LDK_20)
puts ("Conf.: Microtronix LDK 2.0 (LDK2)\n");
#endif
return 0;
}
......
/*
* (C) Copyright 2003, Psyent Corporation <www.psyent.com>
* Scott McNutt <smcnutt@psyent.com>
* Stephan Linz <linz@li-pro.net>
*
* See file CREDITS for list of people who contributed to this
* project.
......@@ -21,6 +22,8 @@
* MA 02111-1307 USA
*/
#include <config.h>
/*************************************************************************
* Exception Vector Table
......@@ -55,8 +58,14 @@
.align 4
_vectors:
.long _def_xhandler@h /* Vector 0 - NMI */
.long _cwp_lolimit@h /* Vector 1 - underflow */
#if defined(CFG_NIOS_CPU_OCI_BASE)
/* OCI does the reset job */
.long _def_xhandler@h /* Vector 0 - NMI / Reset */
#else
/* there is no OCI, so we have to do a direct reset jump here */
.long CFG_NIOS_CPU_RST_VECT /* Vector 0 - Reset to GERMS */
#endif
.long _cwp_lolimit@h /* Vector 1 - underflow */
.long _cwp_hilimit@h /* Vector 2 - overflow */
.long _def_xhandler@h /* Vector 3 - GNUPro debug */
......@@ -72,7 +81,11 @@ _vectors:
.long _def_xhandler@h /* Vector 13 - future reserved */
.long _def_xhandler@h /* Vector 14 - future reserved */
.long _def_xhandler@h /* Vector 15 - future reserved */
#if (CFG_NIOS_TMRIRQ == 16)
.long _timebase_int@h /* Vector 16 - lopri timer*/
#else
.long _def_xhandler@h /* Vector 16 */
#endif
.long _def_xhandler@h /* Vector 17 */
.long _def_xhandler@h /* Vector 18 */
.long _def_xhandler@h /* Vector 19 */
......@@ -106,7 +119,11 @@ _vectors:
.long _def_xhandler@h /* Vector 47 */
.long _def_xhandler@h /* Vector 48 */
.long _def_xhandler@h /* Vector 49 */
#if (CFG_NIOS_TMRIRQ == 50)
.long _timebase_int@h /* Vector 50 - lopri timer*/
#else
.long _def_xhandler@h /* Vector 50 */
#endif
.long _def_xhandler@h /* Vector 51 */
.long _def_xhandler@h /* Vector 52 */
.long _def_xhandler@h /* Vector 53 */
......
......@@ -27,7 +27,7 @@ LIB = lib$(CPU).a
START = start.o
AOBJS = traps.o
OBJS = cpu.o interrupts.o serial.o asmi.o
OBJS = cpu.o interrupts.o serial.o asmi.o spi.o
all: .depend $(START) $(LIB)
......
/*
* (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
* Stephan Linz <linz@li-pro.net>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <linux/ctype.h>
#if defined(CONFIG_NIOS_SPI)
#include <nios-io.h>
#include <spi.h>
#if !defined(CFG_NIOS_SPIBASE)
#error "*** CFG_NIOS_SPIBASE not defined ***"
#endif
#if !defined(CFG_NIOS_SPIBITS)
#error "*** CFG_NIOS_SPIBITS not defined ***"
#endif
#if (CFG_NIOS_SPIBITS != 8) && (CFG_NIOS_SPIBITS != 16)
#error "*** CFG_NIOS_SPIBITS should be either 8 or 16 ***"
#endif
static nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE;
/* Warning:
* You cannot enable DEBUG for early system initalization, i. e. when
* this driver is used to read environment parameters like "baudrate"
* from EEPROM which are used to initialize the serial port which is
* needed to print the debug messages...
*/
#undef DEBUG
#ifdef DEBUG
#define DPRINT(a) printf a;
/* -----------------------------------------------
* Helper functions to peek into tx and rx buffers
* ----------------------------------------------- */
static const char * const hex_digit = "0123456789ABCDEF";
static char quickhex (int i)
{
return hex_digit[i];
}
static void memdump (void *pv, int num)
{
int i;
unsigned char *pc = (unsigned char *) pv;
for (i = 0; i < num; i++)
printf ("%c%c ", quickhex (pc[i] >> 4), quickhex (pc[i] & 0x0f));
printf ("\t");
for (i = 0; i < num; i++)
printf ("%c", isprint (pc[i]) ? pc[i] : '.');
printf ("\n");
}
#else /* !DEBUG */
#define DPRINT(a)
#define memdump(p,n)
#endif /* DEBUG */
/*
* SPI transfer:
*
* See include/spi.h and http://www.altera.com/literature/ds/ds_nios_spi.pdf
* for more informations.
*/
int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
{
int j;
DPRINT(("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n",
(int)chipsel, *(uint *)dout, *(uint *)din, bitlen));
memdump((void*)dout, (bitlen + 7) / 8);
if(chipsel != NULL) {
chipsel(1); /* select the target chip */
}
if (bitlen > CFG_NIOS_SPIBITS) { /* leave chip select active */
spi->control |= NIOS_SPI_SSO;
}
for ( j = 0; /* count each byte in */
j < ((bitlen + 7) / 8); /* dout[] and din[] */
#if (CFG_NIOS_SPIBITS == 8)
j++) {
while ((spi->status & NIOS_SPI_TRDY) == 0)
;
spi->txdata = (unsigned)(dout[j]);
while ((spi->status & NIOS_SPI_RRDY) == 0)
;
din[j] = (unsigned char)(spi->rxdata & 0xff);
#elif (CFG_NIOS_SPIBITS == 16)
j++, j++) {
while ((spi->status & NIOS_SPI_TRDY) == 0)
;
if ((j+1) < ((bitlen + 7) / 8))
spi->txdata = (unsigned)((dout[j] << 8) | dout[j+1]);
else
spi->txdata = (unsigned)(dout[j] << 8);
while ((spi->status & NIOS_SPI_RRDY) == 0)
;
din[j] = (unsigned char)((spi->rxdata >> 8) & 0xff);
if ((j+1) < ((bitlen + 7) / 8))
din[j+1] = (unsigned char)(spi->rxdata & 0xff);
#else
#error "*** unsupported value of CFG_NIOS_SPIBITS ***"
#endif
}
if (bitlen > CFG_NIOS_SPIBITS) {
spi->control &= ~NIOS_SPI_SSO;
}
if(chipsel != NULL) {
chipsel(0); /* deselect the target chip */
}
memdump((void*)din, (bitlen + 7) / 8);
return 0;
}
#endif /* CONFIG_NIOS_SPI */
......@@ -24,7 +24,7 @@ Contents:
1. Files
=========
board/dk1c20/*
board/altera/dk1c20/*
include/configs/DK1C20.h
2. Memory Organization
......@@ -73,11 +73,7 @@ see the following:
2. Quit nios-run and start your terminal application (e.g. start
Hyperterminal or minicom).
3. From the U-Boot command prompt, erase flash 0x40000 to 0x 5ffff:
==> erase 1:4-5
4. Download the u-boot code to RAM. When using Hyperterminal, do the
3. Download the u-boot code to RAM. When using Hyperterminal, do the
following:
a. From the u-boot command prompt start a binary download to SRAM:
......@@ -86,6 +82,10 @@ following:
b. Download u-boot.bin using kermit.
4. From the U-Boot command prompt, erase flash 0x40000 to 0x5ffff:
==> erase 1:4-5
5. Copy the binary image from SRAM to flash:
==> cp.b 800000 40000 10000
......
......@@ -91,10 +91,10 @@ IDE: (TODO)
0x02000000 ---32-----------16|15------------0-
| : | \
| : | |
SDRAM | : | > CFG_NIOS_CPU_SRAM_SIZE
SDRAM | : | > CFG_NIOS_CPU_SDRAM_SIZE
| : | | = 0x01000000
| : | /
0x01000000 ---32-----------16|15------------0- CFG_NIOS_CPU_SRAM_BASE
0x01000000 ---32-----------16|15------------0- CFG_NIOS_CPU_SDRAM_BASE
| |
: gap :
: :
......@@ -345,6 +345,7 @@ IDE: (TODO)
| : | |
0x00040000 --+- - - - - - - -:- - - - - - - -+-|- u-boot _start()
| : | /
0x00000000 |- - - - - - - -:- - - - - - - -+- - u-boot environment
0x00000000 ---8-------------4|3-------------0-
......
Nios Development Kit
Startix Editions
Last Update: January 28, 2004
====================================================================
This file contains information regarding U-Boot and the Altera
Nios Development Kit, Startix Edition (DK-1S10). For general Nios
information see doc/README.nios.
Most stuff of this file was borrowed and based on README.dk1c20,
the DK-1C20 related information file.
For those interested in contributing ... see HELP WANTED section
in doc/README.nios.
Contents:
1. Files
2. Memory Organization
3. CPU Variations
4. Examples
5. Programming U-Boot into FLASH with GERMS
====================================================================
1. Files
=========
board/altera/dk1s10/*
include/configs/DK1S10.h
2. Memory Organization
=======================
-The heap is placed below the monitor (U-Boot code).
-Global data is placed below the heap.
-The stack is placed below global data (&grows down).
3. CPU Variations
=================
There are more than one NIOS CPU variation for the DK-1S10. U-Boot
supports the following CPU configurations:
- Altera Standard 32 (make DK1S10_standard_32_config)
- Microtronix LDK 2.0 (make DK1S10_mtx_ldk_20_config)
4. Examples
============
The hello_world example was never tested on DK-1S10. Neverthelse
it should work as far as possible, because the DK-1S10 port is
more than ninetieth percents equal to the DK-1C20 port and at
this platform the hello_world example was already tested
successfully (see README.dk1c20).
5. Programming U-Boot into FLASH with GERMS
============================================
The current version of the DK-1S10 port with the default
configuration settings occupies about 78 KBytes of flash.
A minimal configuration occupies less than 60 KByte
(network support disabled).
To program U-Boot into the DK-1S10 flash using GERMS do the
following:
1. From the command line, download U-Boot using the nios-run:
$ nios-run -r u-boot.srec
This takes about 45 seconds (GERMS is not very speedy here).
After u-boot is downloaded it will be executed. You should
see the following:
U-Boot 1.0.2 (Jan 28 2004 - 19:02:30)
CPU: Nios-32 Rev. 3.3 (0x3038)
Reg file size: 256 LO_LIMIT/HI_LIMIT: 2/14
Board: Altera Nios 1S10 Development Kit
In: serial
Out: serial
Err: serial
DK1S10 >
2. Quit nios-run and start your terminal application (e.g. start
Hyperterminal or minicom).
3. Download the u-boot code to RAM. When using Hyperterminal, do the
following:
a. From the u-boot command prompt start a binary download to
SRAM / SDRAM:
at the Altera Standard 32 to SRAM:
==> loadb 800000
at the Microtronix LDK 2.0 to SDRAM:
==> loadb 1010000
b. Download u-boot.bin using kermit.
4. From the U-Boot command prompt, erase flash:
at the Altera Standard 32 from 0x40000 to 0x5ffff:
==> erase 1:4-5
at the Microtronix LDK 2.0 from 0x8000000 to 0x81ffff:
==> erase 1:0-1
5. Copy the binary image from SRAM / SDRAM to flash:
at the Altera Standard 32 to SRAM:
==> cp.b 800000 40000 $(filesize)
at the Microtronix LDK 2.0 to SDRAM:
==> cp.b 1010000 8000000 $(filesize)
U-Boot will now automatically start when the board is powered on or
reset using the Standard-32 configuration. To start U-Boot with the
Safe-32 configuration, enter the following GERMS command:
+ g 40000
TODO: specify IDE i/f
===============================================================================
C P U , M E M O R Y , I N / O U T C O M P O N E N T S
===============================================================================
see also [1]-[5]
CPU: "LDK2"
32 bit NIOS for 75 MHz
512 Byte for register file (30 levels)
with out instruction cache
with out data cache
2 KByte On Chip ROM with GERMS boot monitor
with out On Chip RAM
MSTEP multiplier
no Debug Core
no On Chip Instrumentation (OCI)
U-Boot CFG: CFG_NIOS_CPU_CLK = 75000000
CFG_NIOS_CPU_ICACHE = (not present)
CFG_NIOS_CPU_DCACHE = (not present)
CFG_NIOS_CPU_REG_NUMS = 512
CFG_NIOS_CPU_MUL = 0
CFG_NIOS_CPU_MSTEP = 1
CFG_NIOS_CPU_DBG_CORE = 0
IRQ: Nr. | used by
------+--------------------------------------------------------
16 | TIMER0 | CFG_NIOS_CPU_TIMER0_IRQ = 16
17 | UART0 | CFG_NIOS_CPU_UART0_IRQ = 17
18 | UART1 | CFG_NIOS_CPU_UART1_IRQ = 18
20 | LAN91C111 | CFG_NIOS_CPU_LAN0_IRQ = 20
25 | IDE0 | CFG_NIOS_CPU_IDE0_IRQ = 25
MEMORY: 8 MByte Flash
16 MByte SDRAM
Timer: TIMER0: high priority programmable timer (IRQ16)
U-Boot CFG: CFG_NIOS_CPU_TICK_TIMER = 0
CFG_NIOS_CPU_USER_TIMER = (not present)
PIO: Nr. | description
------+--------------------------------------------------------
PIO0 | CFPOWER: 1 output to controll CF power supply
PIO1 | BUTTON: 4 inputs for user push buttons (no IRQ)
------+--------------------------------------------------------
not | LCD: 11 in/outputs for ASCII LCD
pres.| LED: 8 outputs for user LEDs
| SEVENSEG: 16 outputs for user seven segment display
| RECONF: 1 in/output for . . . . . . . . . . . .
| CFPRESENT: 1 input for CF present event (IRQ35)
| CFATASEL: 1 output to controll CF ATA card select
U-Boot CFG: CFG_NIOS_CPU_BUTTON_PIO = 1
CFG_NIOS_CPU_LCD_PIO = (not present)
CFG_NIOS_CPU_LED_PIO = (not present)
CFG_NIOS_CPU_SEVENSEG_PIO = (not present)
CFG_NIOS_CPU_RECONF_PIO = (not present)
CFG_NIOS_CPU_CFPRESENT_PIO = (not present)
CFG_NIOS_CPU_CFPOWER_PIO = 0