Commit f779d739 authored by Michael Walle's avatar Michael Walle Committed by Albert ARIBAUD
Browse files

kirkwood: define CONFIG_SYS_CACHELINE_SIZE



By default, on Kirkwood SoC DCache Lnd ICache line
lengths are 32 bytes long

Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Signed-off-by: default avatarPrafulla Wadaskar <prafulla@marvell.com>
parent 8428a399
......@@ -41,7 +41,8 @@
#include <asm/arch/kirkwood.h>
#define CONFIG_ARM926EJS 1 /* Basic Architecture */
#define CONFIG_SYS_CACHELINE_SIZE 32
/* default Dcache Line length for kirkwood */
#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
......
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