Commit f91c09ac authored by Marek Vasut's avatar Marek Vasut Committed by Stefano Babic

ARM: mx6: Add support for Kosagi Novena

Add support for the Kosagi Novena board. Currently supported are:
- I2C busses
- FEC Ethernet
- MMC0, MMC1, Booting from MMC
- SATA
- USB ports
- USB Ethernet
Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Nikolay Dimitrov <picmaster@mail.bg>
Reviewed-by: default avatarNikolay Dimitrov <picmaster@mail.bg>
parent 9df47577
......@@ -414,6 +414,9 @@ config TARGET_GW_VENTANA
config TARGET_HUMMINGBOARD
bool "Support hummingboard"
config TARGET_KOSAGI_NOVENA
bool "Support Kosagi Novena"
config TARGET_TQMA6
bool "TQ Systems TQMa6 board"
......@@ -646,6 +649,7 @@ source "board/imx31_phycore/Kconfig"
source "board/isee/igep0033/Kconfig"
source "board/jornada/Kconfig"
source "board/karo/tx25/Kconfig"
source "board/kosagi/novena/Kconfig"
source "board/logicpd/imx27lite/Kconfig"
source "board/logicpd/imx31_litekit/Kconfig"
source "board/mpl/vcma9/Kconfig"
......
if TARGET_KOSAGI_NOVENA
config SYS_CPU
default "armv7"
config SYS_BOARD
default "novena"
config SYS_VENDOR
default "kosagi"
config SYS_SOC
default "mx6"
config SYS_CONFIG_NAME
default "novena"
endif
#
# Copyright (C) 2014 Marek Vasut <marex@denx.de>
#
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
obj-y := novena_spl.o
else
obj-y := novena.o
endif
/*
* Novena board support
*
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/errno.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mxc_hdmi.h>
#include <asm/arch/sys_proto.h>
#include <asm/imx-common/boot_mode.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/mxc_i2c.h>
#include <asm/imx-common/sata.h>
#include <asm/imx-common/video.h>
#include <fsl_esdhc.h>
#include <i2c.h>
#include <input.h>
#include <ipu_pixfmt.h>
#include <linux/fb.h>
#include <linux/input.h>
#include <malloc.h>
#include <micrel.h>
#include <miiphy.h>
#include <mmc.h>
#include <netdev.h>
#include <power/pmic.h>
#include <power/pfuze100_pmic.h>
#include <stdio_dev.h>
DECLARE_GLOBAL_DATA_PTR;
#define NOVENA_BUTTON_GPIO IMX_GPIO_NR(4, 14)
#define NOVENA_SD_WP IMX_GPIO_NR(1, 2)
#define NOVENA_SD_CD IMX_GPIO_NR(1, 4)
/*
* GPIO button
*/
#ifdef CONFIG_KEYBOARD
static struct input_config button_input;
static int novena_gpio_button_read_keys(struct input_config *input)
{
int key = KEY_ENTER;
if (gpio_get_value(NOVENA_BUTTON_GPIO))
return 0;
input_send_keycodes(&button_input, &key, 1);
return 1;
}
static int novena_gpio_button_getc(struct stdio_dev *dev)
{
return input_getc(&button_input);
}
static int novena_gpio_button_tstc(struct stdio_dev *dev)
{
return input_tstc(&button_input);
}
static int novena_gpio_button_init(struct stdio_dev *dev)
{
gpio_direction_input(NOVENA_BUTTON_GPIO);
input_set_delays(&button_input, 250, 250);
return 0;
}
int drv_keyboard_init(void)
{
int error;
struct stdio_dev dev = {
.name = "button",
.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM,
.start = novena_gpio_button_init,
.getc = novena_gpio_button_getc,
.tstc = novena_gpio_button_tstc,
};
error = input_init(&button_input, 0);
if (error) {
debug("%s: Cannot set up input\n", __func__);
return -1;
}
button_input.read_keys = novena_gpio_button_read_keys;
error = input_stdio_register(&dev);
if (error)
return error;
return 0;
}
#endif
/*
* SDHC
*/
#ifdef CONFIG_FSL_ESDHC
static struct fsl_esdhc_cfg usdhc_cfg[] = {
{ USDHC3_BASE_ADDR, 0, 4 }, /* Micro SD */
{ USDHC2_BASE_ADDR, 0, 4 }, /* Big SD */
};
int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
/* There is no CD for a microSD card, assume always present. */
if (cfg->esdhc_base == USDHC3_BASE_ADDR)
return 1;
else
return !gpio_get_value(NOVENA_SD_CD);
}
int board_mmc_getwp(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
/* There is no WP for a microSD card, assume always read-write. */
if (cfg->esdhc_base == USDHC3_BASE_ADDR)
return 0;
else
return gpio_get_value(NOVENA_SD_WP);
}
int board_mmc_init(bd_t *bis)
{
s32 status = 0;
int index;
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
/* Big SD write-protect and card-detect */
gpio_direction_input(NOVENA_SD_WP);
gpio_direction_input(NOVENA_SD_CD);
for (index = 0; index < ARRAY_SIZE(usdhc_cfg); index++) {
status = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
if (status)
return status;
}
return status;
}
#endif
/*
* Video over HDMI
*/
#if defined(CONFIG_VIDEO_IPUV3)
static void enable_hdmi(struct display_info_t const *dev)
{
imx_enable_hdmi_phy();
}
struct display_info_t const displays[] = {
{
/* HDMI Output */
.bus = -1,
.addr = 0,
.pixfmt = IPU_PIX_FMT_RGB24,
.detect = detect_hdmi,
.enable = enable_hdmi,
.mode = {
.name = "HDMI",
.refresh = 60,
.xres = 1024,
.yres = 768,
.pixclock = 15385,
.left_margin = 220,
.right_margin = 40,
.upper_margin = 21,
.lower_margin = 7,
.hsync_len = 60,
.vsync_len = 10,
.sync = FB_SYNC_EXT,
.vmode = FB_VMODE_NONINTERLACED
}
}
};
size_t display_count = ARRAY_SIZE(displays);
static void setup_display(void)
{
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
enable_ipu_clock();
imx_setup_hdmi();
/* Turn on LDB0,IPU,IPU DI0 clocks */
setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK);
/* set LDB0, LDB1 clk select to 011/011 */
clrsetbits_le32(&mxc_ccm->cs2cdr,
MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK |
MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK,
(3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) |
(3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET));
setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);
setbits_le32(&mxc_ccm->chsccdr, CHSCCDR_CLK_SEL_LDB_DI0 <<
MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
writel(IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES |
IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH |
IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW |
IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG |
IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT |
IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG |
IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |
IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED |
IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0,
&iomux->gpr[2]);
clrsetbits_le32(&iomux->gpr[3], IOMUXC_GPR3_LVDS0_MUX_CTL_MASK,
IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
}
#endif
int board_early_init_f(void)
{
#if defined(CONFIG_VIDEO_IPUV3)
setup_display();
#endif
/* Bring Ethernet PHY out of reset. */
gpio_set_value(IMX_GPIO_NR(3, 23), 1);
return 0;
}
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
#ifdef CONFIG_CMD_SATA
setup_sata();
#endif
return 0;
}
int checkboard(void)
{
puts("Board: Novena 4x\n");
return 0;
}
int dram_init(void)
{
gd->ram_size = imx_ddr_size();
return 0;
}
/* setup board specific PMIC */
int power_init_board(void)
{
struct pmic *p;
u32 reg;
int ret;
power_pfuze100_init(1);
p = pmic_get("PFUZE100");
if (!p)
return -EINVAL;
ret = pmic_probe(p);
if (ret)
return ret;
pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
/* Set SWBST to 5.0V and enable (for USB) */
pmic_reg_read(p, PFUZE100_SWBSTCON1, &reg);
reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK);
reg |= (SWBST_5_00V | SWBST_MODE_AUTO);
pmic_reg_write(p, PFUZE100_SWBSTCON1, reg);
return 0;
}
/* EEPROM configuration data */
struct novena_eeprom_data {
uint8_t signature[6];
uint8_t version;
uint8_t reserved;
uint32_t serial;
uint8_t mac[6];
uint16_t features;
};
int misc_init_r(void)
{
struct novena_eeprom_data data;
uchar *datap = (uchar *)&data;
const char *signature = "Novena";
int ret;
/* If 'ethaddr' is already set, do nothing. */
if (getenv("ethaddr"))
return 0;
/* EEPROM is at bus 2. */
ret = i2c_set_bus_num(2);
if (ret) {
puts("Cannot select EEPROM I2C bus.\n");
return 0;
}
/* EEPROM is at address 0x56. */
ret = eeprom_read(0x56, 0, datap, sizeof(data));
if (ret) {
puts("Cannot read I2C EEPROM.\n");
return 0;
}
/* Check EEPROM signature. */
if (memcmp(data.signature, signature, 6)) {
puts("Invalid I2C EEPROM signature.\n");
return 0;
}
/* Set ethernet address from EEPROM. */
eth_setenv_enetaddr("ethaddr", data.mac);
return ret;
}
This diff is collapsed.
/*
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
/* image version */
IMAGE_VERSION 2
/* Boot Device : sd */
BOOT_FROM sd
#define __ASSEMBLY__
#include <config.h>
#include "asm/arch/iomux.h"
#include "asm/arch/crm_regs.h"
/* set the default clock gate to save power */
DATA 4, CCM_CCGR0, 0x00C03F3F
DATA 4, CCM_CCGR1, 0x0030FC03
DATA 4, CCM_CCGR2, 0x0FFFC000
DATA 4, CCM_CCGR3, 0x3FF00000
DATA 4, CCM_CCGR4, 0xFFFFF300 /* enable NAND/GPMI/BCH clocks */
DATA 4, CCM_CCGR5, 0x0F0000C3
DATA 4, CCM_CCGR6, 0x000003FF
/* enable AXI cache for VDOA/VPU/IPU */
DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF
/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
DATA 4, MX6_IOMUXC_GPR6, 0x007F007F
DATA 4, MX6_IOMUXC_GPR7, 0x007F007F
/*
* Setup CCM_CCOSR register as follows:
*
* cko1_en = 1 --> CKO1 enabled
* cko1_div = 111 --> divide by 8
* cko1_sel = 1011 --> ahb_clk_root
*
* This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
*/
DATA 4, CCM_CCOSR, 0x000000fb
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/kosagi/novena/setup.cfg,MX6Q,SPL"
+S:CONFIG_ARM=y
+S:CONFIG_TARGET_KOSAGI_NOVENA=y
......@@ -27,7 +27,7 @@
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x00908000
#define CONFIG_SPL_MAX_SIZE (64 * 1024)
#define CONFIG_SPL_MAX_SIZE 0x10000
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7"
#define CONFIG_SPL_STACK 0x0091FFB8
#define CONFIG_SPL_LIBCOMMON_SUPPORT
......
/*
* Configuration settings for the Novena U-boot.
*
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/* System configurations */
#define CONFIG_MX6
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DOS_PARTITION
#define CONFIG_FAT_WRITE
#define CONFIG_FIT
#define CONFIG_KEYBOARD
#define CONFIG_MXC_GPIO
#define CONFIG_OF_LIBFDT
#define CONFIG_REGEX
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_SYS_NO_FLASH
#include "configs/mx6_common.h"
#include <asm/arch/imx-regs.h>
#include <asm/imx-common/gpio.h>
#include <config_cmd_default.h>
/* U-Boot Commands */
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_BMODE
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
#define CONFIG_CMD_FAT
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_I2C
#define CONFIG_CMD_FUSE
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
#define CONFIG_CMD_SATA
#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_TIME
#define CONFIG_CMD_USB
#define CONFIG_VIDEO
/* U-Boot general configurations */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
/* Print buffer size */
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
#define CONFIG_AUTO_COMPLETE /* Command auto complete */
#define CONFIG_CMDLINE_EDITING /* Command history etc */
#define CONFIG_SYS_HUSH_PARSER
/* U-Boot environment */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_SIZE (16 * 1024)
/*
* Environment is on MMC, starting at offset 512KiB from start of the card.
* Please place first partition at offset 1MiB from the start of the card
* as recommended by GNU/fdisk. See below for details:
* http://homepage.ntlworld.com./jonathan.deboynepollard/FGA/disc-partition-alignment.html
*/
#ifdef CONFIG_CMD_MMC
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_OFFSET (512 * 1024)
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
#define CONFIG_ENV_OFFSET_REDUND \
(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#else
#define CONFIG_ENV_IS_NOWHERE
#endif
/* Booting Linux */
#define CONFIG_BOOTDELAY 5
#define CONFIG_BOOTFILE "fitImage"
#define CONFIG_BOOTARGS "console=ttymxc1,115200 "
#define CONFIG_BOOTCOMMAND "run net_nfs"
#define CONFIG_LOADADDR 0x18000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_HOSTNAME novena
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE 0xF0000000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x20000000
#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
/* SPL */
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#include "imx6_spl.h" /* common IMX6 SPL configuration */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
/* Ethernet Configuration */
#ifdef CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0x7
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021
#define CONFIG_ARP_TIMEOUT 200UL
#endif
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
/* I2C EEPROM */
#ifdef CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_SPD_BUS_NUM 2
#endif
/* MMC Configs */
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 2
#endif
/* OCOTP Configs */
#ifdef CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP
#endif
/* PCI express */
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(3, 29)
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(7, 12)
#endif
/* PMIC */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
/* SATA Configs */
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#define CONFIG_LIBATA
#endif
/* UART */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONFIG_BAUDRATE 115200
#define CONFIG_CONS_INDEX 1
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_USB_KEYBOARD
#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
/* Gadget part */
#define CONFIG_CI_UDC
#define CONFIG_USBD_HS
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_CDC
#define CONFIG_NETCONSOLE
#endif
/* Video output */
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_CMD_HDMIDETECT
#define CONFIG_CONSOLE_MUX
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
#endif
/* Extra U-Boot environment. */
#define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"consdev=ttymxc1\0" \
"baudrate=115200\0" \
"bootdev=/dev/mmcblk0p1\0" \
"rootdev=/dev/mmcblk0p2\0" \
"netdev=eth0\0" \
"kernel_addr_r=0x18000000\0" \
"addcons=" \
"setenv bootargs ${bootargs} " \
"console=${consdev},${baudrate}\0" \
"addip=" \
"setenv bootargs ${bootargs} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:" \
"${netmask}:${hostname}:${netdev}:off\0" \
"addmisc=" \
"setenv bootargs ${bootargs} ${miscargs}\0" \
"addargs=run addcons addmisc\0" \
"mmcload=" \
"mmc rescan ; " \
"ext4load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
"netload=" \
"tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
"miscargs=nohlt panic=1\0" \
"mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
"nfsargs=" \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath},v3,tcp\0" \
"mmc_mmc=" \
"run mmcload mmcargs addargs ; " \
"bootm ${kernel_addr_r}\0" \
"mmc_nfs=" \
"run mmcload nfsargs addip addargs ; " \
"bootm ${kernel_addr_r}\0" \
"net_mmc=" \
"run netload mmcargs addargs ; " \
"bootm ${kernel_addr_r}\0" \
"net_nfs=" \
"run netload nfsargs addip addargs ; " \
"bootm ${kernel_addr_r}\0" \
"update_sd_spl_filename=SPL\0" \
"update_sd_uboot_filename=u-boot.img\0" \
"update_sd_firmware=" /* Update the SD firmware partition */ \
"if mmc rescan ; then " \
"if dhcp ${update_sd_spl_filename} ; then " \