Commit fe7eb5d8 authored by Wolfgang Denk's avatar Wolfgang Denk

Cleanup

parent 74f4304e
......@@ -1409,7 +1409,7 @@ xtract_int_cm = $(subst integrator$1_,,$(subst _config,,$2))
integratorap_config : unconfig
@echo -n "/* Integrator configuration implied " > tmp.fil; \
echo " by Makefile target */" >> tmp.fil; \
echo >> tmp.fil
echo >> tmp.fil
@echo -n "#define CONFIG_INTEGRATOR 1" >> tmp.fil; \
echo " /* Integrator board */" >> tmp.fil; \
echo -n "#define CONFIG_ARCH_INTEGRATOR" >> tmp.fil; \
......@@ -1435,7 +1435,7 @@ integratorap_CM10220E_config integratorap_CM1026EJ_S_config \
integratorap_CM1136JF_S_config : unconfig
@echo -n "/* Integrator configuration implied " > tmp.fil; \
echo " by Makefile target */" >> tmp.fil; \
echo >> tmp.fil
echo >> tmp.fil
@echo -n "#define CONFIG_INTEGRATOR 1" >> tmp.fil; \
echo " /* Integrator board */" >> tmp.fil; \
echo -n "#define CONFIG_ARCH_INTEGRATOR" >> tmp.fil; \
......@@ -1481,7 +1481,7 @@ integratorap_CM1136JF_S_config : unconfig
integratorcp_config : unconfig
@echo -n "/* Integrator configuration implied " > tmp.fil; \
echo " by Makefile target */" >> tmp.fil; \
echo >> tmp.fil
echo >> tmp.fil
@echo -n "#define CONFIG_INTEGRATOR 1" >> tmp.fil; \
echo " /* Integrator board */" >> tmp.fil; \
echo -n "#define CONFIG_ARCH_CINTEGRATOR" >> tmp.fil; \
......@@ -1520,7 +1520,7 @@ integratorcp_CM10220E_config integratorcp_CM1026EJ_S_config \
integratorcp_CM1136JF_S_config : unconfig
@echo -n "/* Integrator configuration implied " > tmp.fil; \
echo " by Makefile target */" >> tmp.fil; \
echo >> tmp.fil
echo >> tmp.fil
@echo -n "#define CONFIG_INTEGRATOR 1" >> tmp.fil; \
echo " /* Integrator board */" >> tmp.fil; \
echo -n "#define CONFIG_ARCH_CINTEGRATOR" >> tmp.fil; \
......
......@@ -49,4 +49,3 @@ distclean: clean
-include .depend
#########################################################################
......@@ -24,7 +24,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
......@@ -109,17 +109,17 @@ static struct pci_config_table pci_integrator_config_table[] = {
/* V3 access routines */
#define _V3Write16(o,v) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o)) = (unsigned short)(v))
#define _V3Read16(o) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o)))
#define _V3Read16(o) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o)))
#define _V3Write32(o,v) (*(volatile unsigned int *)(PCI_V3_BASE + (unsigned int)(o)) = (unsigned int)(v))
#define _V3Read32(o) (*(volatile unsigned int *)(PCI_V3_BASE + (unsigned int)(o)))
#define _V3Read32(o) (*(volatile unsigned int *)(PCI_V3_BASE + (unsigned int)(o)))
/* Compute address necessary to access PCI config space for the given */
/* bus and device. */
#define PCI_CONFIG_ADDRESS( __bus, __devfn, __offset ) ({ \
unsigned int __address, __devicebit; \
unsigned short __mapaddress; \
unsigned int __dev = PCI_DEV (__devfn); /* FIXME to check!! (slot?) */ \
unsigned int __dev = PCI_DEV (__devfn); /* FIXME to check!! (slot?) */ \
\
if (__bus == 0) { \
/* local bus segment so need a type 0 config cycle */ \
......@@ -142,10 +142,10 @@ static struct pci_config_table pci_integrator_config_table[] = {
/* A31-A24 are don't care (so clear to 0) */ \
__mapaddress = 0x000B; /* 101=>config cycle, 1=>A1&A0 from PCI_CFG */ \
__address = PCI_CONFIG_BASE; \
__address |= ((__bus & 0xFF) << 16); /* bits 23..16 = bus number */ \
__address |= ((__dev & 0x1F) << 11); /* bits 15..11 = device number */ \
__address |= ((__bus & 0xFF) << 16); /* bits 23..16 = bus number */ \
__address |= ((__dev & 0x1F) << 11); /* bits 15..11 = device number */ \
__address |= ((__devfn & 0x07) << 8); /* bits 10..8 = function number */ \
__address |= __offset & 0xFF; /* bits 7..0 = register number */ \
__address |= __offset & 0xFF; /* bits 7..0 = register number */ \
} \
_V3Write16 (V3_LB_MAP1, __mapaddress); \
__address; \
......@@ -463,7 +463,7 @@ void flash__init (void)
/*************************************************************
Routine:ether__init
Description: take the Ethernet controller out of reset and wait
for the EEPROM load to complete.
for the EEPROM load to complete.
*************************************************************/
void ether__init (void)
{
......@@ -483,36 +483,36 @@ int dram_init (void)
* and is a 16-bit counter
*/
/* U-Boot expects a 32 bit timer running at CFG_HZ*/
static ulong timestamp; /* U-Boot ticks since startup */
static ulong total_count = 0; /* Total timer count */
static ulong lastdec; /* Timer reading at last call */
static ulong div_clock = 256; /* Divisor applied to the timer clock */
static ulong div_timer = 1; /* Divisor to convert timer reading
* change to U-Boot ticks
*/
static ulong timestamp; /* U-Boot ticks since startup */
static ulong total_count = 0; /* Total timer count */
static ulong lastdec; /* Timer reading at last call */
static ulong div_clock = 256; /* Divisor applied to the timer clock */
static ulong div_timer = 1; /* Divisor to convert timer reading
* change to U-Boot ticks
*/
/* CFG_HZ = CFG_HZ_CLOCK/(div_clock * div_timer) */
#define TIMER_LOAD_VAL 0x0000FFFFL
#define READ_TIMER ((*(volatile ulong *)(CFG_TIMERBASE+4)) & 0x0000FFFFL)
/* all function return values in U-Boot ticks i.e. (1/CFG_HZ) sec
/* all function return values in U-Boot ticks i.e. (1/CFG_HZ) sec
* - unless otherwise stated
*/
/* starts a counter
* - the Integrator/AP timer issues an interrupt
* each time it reaches zero
/* starts a counter
* - the Integrator/AP timer issues an interrupt
* each time it reaches zero
*/
int interrupt_init (void)
{
/* Load timer with initial value */
*(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
/* Set timer to be
* enabled 1
* free-running 0
* XX 00
* divider 256 10
* XX 00
* enabled 1
* free-running 0
* XX 00
* divider 256 10
* XX 00
*/
*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x00000088;
total_count = 0;
......@@ -555,10 +555,9 @@ void udelay (unsigned long usec)
tmo /= (1000000L);
tmp = get_timer_masked(); /* get current timestamp */
tmo += tmp; /* wake up timestamp */
tmo += tmp; /* wake up timestamp */
while (get_timer_masked () < tmo)/* loop till event */
{
while (get_timer_masked () < tmo) { /* loop till event */
/*NOP*/;
}
}
......@@ -566,11 +565,11 @@ void udelay (unsigned long usec)
void reset_timer_masked (void)
{
/* reset time */
lastdec = READ_TIMER; /* capture current decrementer value */
lastdec = READ_TIMER; /* capture current decrementer value */
timestamp = 0; /* start "advancing" time stamp from 0 */
}
/* converts the timer reading to U-Boot ticks */
/* converts the timer reading to U-Boot ticks */
/* the timestamp is the number of ticks since reset */
/* This routine does not detect wraps unless called regularly
ASSUMES a call at least every 16 seconds to detect every reload */
......@@ -578,14 +577,13 @@ ulong get_timer_masked (void)
{
ulong now = READ_TIMER; /* current count */
if(now > lastdec)
{
if (now > lastdec) {
/* Must have wrapped */
total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
} else {
total_count += lastdec - now;
}
lastdec = now;
lastdec = now;
timestamp = total_count/div_timer;
return timestamp;
......@@ -594,7 +592,7 @@ ulong get_timer_masked (void)
/* waits specified delay value and resets timestamp */
void udelay_masked (unsigned long usec)
{
udelay(usec);
udelay(usec);
}
/*
......
/*
* Memory setup for integratorAP
* Memory setup for integratorAP
*
* See file CREDITS for list of people who contributed to this
* project.
......@@ -27,4 +27,3 @@
.globl memsetup
memsetup:
mov pc,lr
......@@ -42,4 +42,3 @@ reset_cpu:
reset_failed:
b reset_failed
......@@ -24,7 +24,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
......@@ -108,33 +108,33 @@ int dram_init (void)
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#ifdef CONFIG_CM_SPD_DETECT
{
{
extern void dram_query(void);
unsigned long cm_reg_sdram;
unsigned long sdram_shift;
dram_query(); /* Assembler accesses to CM registers */
/* Queries the SPD values */
/* Queries the SPD values */
/* Obtain the SDRAM size from the CM SDRAM register */
cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
/* Register SDRAM size
*
* 0xXXXXXXbbb000bb 16 MB
* 0xXXXXXXbbb001bb 32 MB
* 0xXXXXXXbbb010bb 64 MB
* 0xXXXXXXbbb011bb 128 MB
* 0xXXXXXXbbb100bb 256 MB
*
/* Register SDRAM size
*
* 0xXXXXXXbbb000bb 16 MB
* 0xXXXXXXbbb001bb 32 MB
* 0xXXXXXXbbb010bb 64 MB
* 0xXXXXXXbbb011bb 128 MB
* 0xXXXXXXbbb100bb 256 MB
*
*/
sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
}
}
#endif /* CM_SPD_DETECT */
return 0;
......@@ -147,13 +147,13 @@ extern void dram_query(void);
/* U-Boot expects a 32 bit timer, running at CFG_HZ */
/* Keep total timer count to avoid losing decrements < div_timer */
static unsigned long long total_count = 0;
static unsigned long long lastdec; /* Timer reading at last call */
static unsigned long long lastdec; /* Timer reading at last call */
static unsigned long long div_clock = 1; /* Divisor applied to timer clock */
static unsigned long long div_timer = 1; /* Divisor to convert timer reading
* change to U-Boot ticks
*/
/* CFG_HZ = CFG_HZ_CLOCK/(div_clock * div_timer) */
static ulong timestamp; /* U-Boot ticks since startup */
static ulong timestamp; /* U-Boot ticks since startup */
#define TIMER_LOAD_VAL ((ulong)0xFFFFFFFF)
#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
......@@ -169,13 +169,13 @@ int interrupt_init (void)
/* Load timer with initial value */
*(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
/* Set timer to be
* enabled 1
* periodic 1
* no interrupts 0
* X 0
* divider 1 00 == less rounding error
* 32 bit 1
* wrapping 0
* enabled 1
* periodic 1
* no interrupts 0
* X 0
* divider 1 00 == less rounding error
* 32 bit 1
* wrapping 0
*/
*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x000000C2;
/* init the timestamp */
......@@ -219,8 +219,7 @@ void udelay (unsigned long usec)
tmp = get_timer_masked(); /* get current timestamp */
tmo += tmp; /* form target timestamp */
while (get_timer_masked () < tmo)/* loop till event */
{
while (get_timer_masked () < tmo) {/* loop till event */
/*NOP*/;
}
}
......@@ -228,26 +227,25 @@ void udelay (unsigned long usec)
void reset_timer_masked (void)
{
/* capure current decrementer value */
lastdec = (unsigned long long)READ_TIMER;
lastdec = (unsigned long long)READ_TIMER;
/* start "advancing" time stamp from 0 */
timestamp = 0L;
timestamp = 0L;
}
/* converts the timer reading to U-Boot ticks */
/* converts the timer reading to U-Boot ticks */
/* the timestamp is the number of ticks since reset */
ulong get_timer_masked (void)
{
/* get current count */
unsigned long long now = (unsigned long long)READ_TIMER;
if(now > lastdec)
{
if(now > lastdec) {
/* Must have wrapped */
total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
} else {
total_count += lastdec - now;
}
lastdec = now;
lastdec = now;
timestamp = (ulong)(total_count/div_timer);
return timestamp;
......
/*
* Memory setup for integratorAP
* Memory setup for integratorAP
*
* See file CREDITS for list of people who contributed to this
* project.
......@@ -27,4 +27,3 @@
.globl memsetup
memsetup:
mov pc,lr
......@@ -14,7 +14,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
......@@ -52,8 +52,8 @@ platformsetup:
#ifdef CONFIG_CM_INIT
/* CM has an initialization register
* - bits in it are wired into test-chip pins to force
* reset defaults
* - may need to change its contents for U-Boot
* reset defaults
* - may need to change its contents for U-Boot
*/
/* set the desired CM specific value */
......@@ -65,39 +65,39 @@ platformsetup:
#if !defined (CONFIG_CM920T) && !defined (CONFIG_CM920T_ETM) && \
!defined (CONFIG_CM940T)
#ifdef CONFIG_CM_MULTIPLE_SSRAM
/* set simple mapping */
#ifdef CONFIG_CM_MULTIPLE_SSRAM
/* set simple mapping */
and r2,r2,#CMMASK_MAP_SIMPLE
#endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */
#ifdef CONFIG_CM_TCRAM
/* disable TCRAM */
#ifdef CONFIG_CM_TCRAM
/* disable TCRAM */
and r2,r2,#CMMASK_TCRAM_DISABLE
#endif /* #ifdef CONFIG_CM_TCRAM */
#endif /* #ifdef CONFIG_CM_TCRAM */
#if defined (CONFIG_CM926EJ_S) || defined (CONFIG_CM1026EJ_S) || \
defined (CONFIG_CM1136JF_S)
and r2,r2,#CMMASK_LE
#endif /* cpu with little endian initialization */
orr r2,r2,#CMMASK_CMxx6_COMMON
#endif /* CMxx6 code */
#endif /* ARM102xxE value */
/* read CM_INIT */
/* read CM_INIT */
mov r0, #CM_BASE
ldr r1, [r0, #OS_INIT]
/* check against desired bit setting */
and r3,r1,r2
cmp r3,r2
beq init_reg_OK
/* lock for change */
/* lock for change */
mov r3, #CMVAL_LOCK
and r3,r3,#CMMASK_LOCK
str r3, [r0, #OS_LOCK]
......@@ -112,39 +112,39 @@ platformsetup:
b reset_cpu
init_reg_OK:
#endif /* CONFIG_CM_INIT */
#endif /* CONFIG_CM_INIT */
mov pc, lr
#ifdef CONFIG_CM_SPD_DETECT
#ifdef CONFIG_CM_SPD_DETECT
/* Fast memory is available for the DRAM data
* - ensure it has been transferred, then summarize the data
* - ensure it has been transferred, then summarize the data
* into a CM register
*/
.globl dram_query
dram_query:
stmfd r13!,{r4-r6,lr}
/* set up SDRAM info */
/* set up SDRAM info */
/* - based on example code from the CM User Guide */
mov r0, #CM_BASE
readspdbit:
ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */
and r1, r1, #0x20 /* mask SPD bit (5) */
cmp r1, #0x20 /* test if set */
ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */
and r1, r1, #0x20 /* mask SPD bit (5) */
cmp r1, #0x20 /* test if set */
bne readspdbit
setupsdram:
add r0, r0, #OS_SPD /* address the copy of the SDP data */
ldrb r1, [r0, #3] /* number of row address lines */
ldrb r1, [r0, #3] /* number of row address lines */
ldrb r2, [r0, #4] /* number of column address lines */
ldrb r3, [r0, #5] /* number of banks */
ldrb r4, [r0, #31] /* module bank density */
ldrb r3, [r0, #5] /* number of banks */
ldrb r4, [r0, #31] /* module bank density */
mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */
mov r5, r5, ASL#2 /* size in MB */
mov r0, #CM_BASE /* reload for later code */
cmp r5, #0x10 /* is it 16MB? */
mov r5, r5, ASL#2 /* size in MB */
mov r0, #CM_BASE /* reload for later code */
cmp r5, #0x10 /* is it 16MB? */
bne not16
mov r6, #0x2 /* store size and CAS latency of 2 */
b writesize
......@@ -175,21 +175,21 @@ not128:
writesize:
mov r1, r1, ASL#8 /* row addr lines from SDRAM reg */
orr r2, r1, r2, ASL#12 /* OR in column address lines */
orr r3, r2, r3, ASL#16 /* OR in number of banks */
orr r6, r6, r3 /* OR in size and CAS latency */
str r6, [r0, #OS_SDRAM] /* store SDRAM parameters */
orr r2, r1, r2, ASL#12 /* OR in column address lines */
orr r3, r2, r3, ASL#16 /* OR in number of banks */
orr r6, r6, r3 /* OR in size and CAS latency */
str r6, [r0, #OS_SDRAM] /* store SDRAM parameters */
#endif /* #ifdef CONFIG_CM_SPD_DETECT */
ldmfd r13!,{r4-r6,pc} /* back to caller */
#ifdef CONFIG_CM_REMAP
/* CM remap bit is operational
#ifdef CONFIG_CM_REMAP
/* CM remap bit is operational
* - use it to map writeable memory at 0x00000000, in place of flash
*/
.globl cm_remap
cm_remap:
cm_remap:
stmfd r13!,{r4-r10,lr}
mov r0, #CM_BASE
......@@ -198,9 +198,9 @@ cm_remap:
str r1, [r0, #OS_CTRL]
/* Now 0x00000000 is writeable, replace the vectors */
ldr r0, =_start /* r0 <- start of vectors */
ldr r2, =_armboot_start /* r2 <- past vectors */
sub r1,r1,r1 /* destination 0x00000000 */
ldr r0, =_start /* r0 <- start of vectors */
ldr r2, =_armboot_start /* r2 <- past vectors */
sub r1,r1,r1 /* destination 0x00000000 */
copy_vec:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
......@@ -208,7 +208,6 @@ copy_vec:
cmp r0, r2 /* until source end address [r2] */
ble copy_vec
ldmfd r13!,{r4-r10,pc} /* back to caller */
ldmfd r13!,{r4-r10,pc} /* back to caller */
#endif /* #ifdef CONFIG_CM_REMAP */
......@@ -122,7 +122,7 @@ int misc_init_r (void)
void watchdog_init(void)
{
/* There are 4 watch dogs. 1 secure, and 3 general purpose.
* The ROM takes care of the secure one. Of the 3 GP ones,
* The ROM takes care of the secure one. Of the 3 GP ones,
* 1 can reset us directly, the other 2 only generate MPU interrupts.
*/
__raw_writel(WD_UNLOCK1 ,WD2_BASE+WSPR);
......
......@@ -165,7 +165,7 @@ void do_irq (struct pt_regs *pt_regs)
/* ASSUMED to be a timer interrupt */
/* Just clear it - count handled in */
/* integratorap.c */
*(volatile ulong *)(CFG_TIMERBASE + 0x0C) = 0;
*(volatile ulong *)(CFG_TIMERBASE + 0x0C) = 0;
#else
printf ("interrupt request\n");
show_regs (pt_regs);
......
......@@ -395,7 +395,7 @@ fiq:
# ifdef CONFIG_INTEGRATOR
/* Satisfied by Integrator routine (AP or CP) */
/* Satisfied by Integrator routine (AP or CP) */
#else
......@@ -414,4 +414,3 @@ rstctl1:
.word 0xfffece10
#endif /* #ifdef CONFIG_INTEGRATOR */
......@@ -41,4 +41,3 @@ $(LIB): $(OBJS)
sinclude .depend
#########################################################################
......@@ -16,7 +16,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
......@@ -39,7 +39,7 @@ static unsigned long read_p15_c1 (void)
unsigned long value;
__asm__ __volatile__(
"mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
"mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
: "=r" (value)
:
: "memory");
......@@ -57,7 +57,7 @@ static void write_p15_c1 (unsigned long value)
printf ("write %08lx to p15/c1\n", value);
#endif
__asm__ __volatile__(
"mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
"mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
:
: "r" (value)
: "memory");
......@@ -82,7 +82,7 @@ static void cp_delay (void)
#define C1_SYS_PROT (1<<8) /* system protection */
#define C1_ROM_PROT (1<<9) /* ROM protection */
#define C1_IC (1<<12) /* icache off/on */
#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
int cpu_init (void)
......@@ -112,10 +112,10 @@ int cleanup_before_linux (void)
disable_interrupts ();
/* ARM926E-S needs the protection unit enabled for the icache to have
* been enabled - left for possible later use
/* ARM926E-S needs the protection unit enabled for the icache to have
* been enabled - left for possible later use