BSP add HDP firmware loading for video.
android daily build for the configure is not align with BSP.
align BSP uboot configure.

Change-Id: I56ce146a40eeed63e71795870d48387385903f8a
Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>

Added default environment for hdp loading.
Added hdp loading as default for iMX8QM ARM2 and MEK boards.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>

Adding the HDP firmware loading to the build.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>

This adds a command to load the HDP firmware and supporting libraries.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>

When sd/mmc work at DDR mode, like HS400/HS400ES/DDR52/DDR50 mode,
the actual clock rate is just half of the expected clock.

This patch set the DDR_EN bit first for DDR mode, hardware divide
the usdhc clock automatically, then follow the original sdr clock
setting method.

This patch also remove the unused variable 'is_ddr'.
Acked-by: Li Ye <ye.li@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>

Since SCFW switches off the base board at default, we need to turn on it
in u-boot, so that perpherals on base board can work.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

These commands try to be as generic as possible and avoid duplicating
argument values used for regular boot.

The fdt_file parameter still needs to be set to a .dtb for dom0. Booting
xen with stock dtb would require more hacks, for example lpuart
interrupt-parent = <&wu> needs to be removed.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>

ATF will power off all PUs at default, so for USB, we enable
its PU power for both host and device modes in board_usb_init and
disable the power when usb is stop in board_usb_cleanup.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Li Jun <jun.li@nxp.com>

Due to the APLL out glitch issue TKT332232, the APLLCFG PLLS bit must be set
to select SCG1 APLL PFD for generating system clock to align with the design.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access
it. So check the CPU rev and not apply the settings for B0.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

Since there is no register for CPU revision, we use ROM version to
check the A0 or B0 chip.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

Currently, the DPLL of conn ss is not stable, will cause usdhc
data CRC error. So here change USDHC_CLK_ROOT source from AVPLL
as a workaround. And config USDHC1_CLK_ROOT to 333MHz, USDHC2_CLK_ROOT
to 200MHz. This workaround do not impact SD performance, but decrease
the eMMC performance, HS400ES work clock change from 198MHz to 166MHz,
read performance drop about 10%, write performance drop about 6%.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>

Change the pre_div to value 1, otherwise the actual sd/mmc clock
frequency is always half of the expect frequency.
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>

When using SPL NAND boot, the required malloc memory is larger than SD/eMMC boot.
Since we have used out OCRAM (for ATF) and OCRAM_S, there is no enough memory could be
allocated.

The solution is moving the malloc memory pool to DDR. The malloc pool is initialized in
board_init_r, so we moved the VDD_DRAM adjustment and DDR init to board_init_f. Then the DDR
can setup before memory pool initialization. Because the i2c and PMIC driver needs to malloc
data, this change has to enable malloc_f pool by setting CONFIG_MALLOC_F_ADDR to previous
malloc address on OCRAM_S.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

Update the mini driver to add support for getting ecc info from ONFI and
support read image data from page unaligned NAND address.
Signed-off-by: Ye Li <ye.li@nxp.com>

The offset of u-boot for i.MX8 boards is 33k bytes, writing whole gpt
image (34k) will break u-boot when the board is booted with SD card.
This patch only write vaild part (first 17k bytes) of gpt into SD card
and will keep backup gpt at the last LBA.

Change-Id: Iac5d337fb11a3e3ad2a9686efbfbacf9523dae58
Signed-off-by: Luo Ji <ji.luo@nxp.com>

Add support for DDR4 board in u-boot.
Main changes are the SD card slot and ddr
type
Signed-off-by: Teo Hall <teo.hall@nxp.com>

Use mx6qp.cfg for optee support.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

Add xen env, "run xenboot" to boot xen.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

Add board codes, configurations, DTS and DDR initialization codes for the
DDR3L and DDR4 ARM2 boards.

Supported modules
    - DDR3L ARM2: Two RANK DDR3L, QSPI B, eMMC/SD, RMII ENET, UART.
    - DDR4  ARM2: Two RANK DDR4, SD, NAND, RGMII ENET, UART.
      NAND read/write/erase is ok in u-boot, NAND SPL boot will be tested later
      when tool is ready.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

Update the gpmi/apbh_dma/bch drivers and relevant registers for i.MX8M.
Signed-off-by: Ye Li <ye.li@nxp.com>

The i.MX8MQ DDR3L ARM2 boards uses gd25q16c flash device, add its id
to spi flash ids table.
Signed-off-by: Ye Li <ye.li@nxp.com>

Add 400Mhz, 600Mhz and 800Mhz frequencies for dram pll init function to
support DDR3L/DDR4/LPDDR4.
Signed-off-by: Ye Li <ye.li@nxp.com>

Enable the RX and TX FIFO in LPUART driver to avoid the input lost
during u-boot boot up.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

Sync the FEC1 and FEC2 pad settings with latest kernel DTS
(commit a67f777dfb805fa72ffe31911a18d8c0a9683f73)
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by Fugang Duan <fugang.duan@nxp.com>

When IMX_OPTEE is enabled for secure boot, update bootm to authenticate the optee
image and the kernel zImage before booting into optee.
Signed-off-by: Ye Li <ye.li@nxp.com>

Fix mfgtool bootcmd error
Signed-off-by: Peng Fan <peng.fan@nxp.com>

Due to RGMII interface timing requirement for imx8qm/qxp mek and arm2
board, it needs to enable RX clock delay.

It should not depend on HW default status since kernel may clear the
bit only on imx8qm/qxp platforms, then reboot test will cause uboot
networking failed.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>

  Add defconfig for tee support;
  Enable the TZASC support;
  Add env config for tee support.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

  Add different defconfig for optee;
  Enable the TZASC support;
  Add env config for tee support.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

Print out atf commit in U-Boot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

1. With this change, no flickering when LCDIF + MIPI-DSI
   in 720p60 single display case
2. With this change, no flickering when DCSS in 4kp60
   while running 4x memtester at the same time

side effect:
GPU resolve performance downgrade ~20%, no obvious impact
to non-resolve GPU cases.
Signed-off-by: Jian Li <jian.li@nxp.com>

This code was originally developed by Raul Cardenas <raul.casas@nxp.com>
and modified to be applied in U-Boot imx_v2017.03.

More information about the initial submission can be seen
in the link below:
https://lists.denx.de/pipermail/u-boot/2016-February/245273.html

i.MX7D has an a protection feature for Manufacturing process.
This feature uses asymmetric encryption to sign and verify
authenticated software handled between parties. This command
enables the use of such feature.

The private key is unique and generated once per device.
And it is stored in secure memory and only accessible by CAAM.
Therefore, the public key generation and signature functions
are the only functions available for the user.

The manufacturing-protection authentication process can be used to
authenticate the chip to the OEM's server.

Command usage:

Print the public key for the device.
- mfgprot pubk

Generates Signature over given data.
- mfgprot sign <data_address> <data_size>
Signed-off-by: Raul Ulises Cardenas <raul.casas@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>

The EVK board does not use external pull up resistor for SD CD pin, it requires
the pad to be configured as pull up, otherwise the signal level is always low even
the card is not inserted.

This patch configures the pad of CD and RESET to pull up to align with kernel,
although there is already a external pull up for RESET.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

When secure boot is enabled, add authenticate_image in booti to authenticate
kernel image.
Signed-off-by: Ye Li <ye.li@nxp.com>

When current EL is not EL3, the direct calling to HAB will fail because
CAAM/SNVS can't initialize at non-secure mode. In this case, we use
SIP call to run the HAB in ATF.
Signed-off-by: Ye Li <ye.li@nxp.com>

Need to pass total 5 arguments for SIP HAB call, so update the interface
to add new argument.
Signed-off-by: Ye Li <ye.li@nxp.com>

The TMU calibration data in u-boot DTB is not updated, so the temperature
we got in u-boot won't exceed 40C.
This patch updates the TMU node with latest kernel DTB
(commit ee0a9fbdca80b058c00d74c6afa70558f6c1dcc6)
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

The codes use the QSPI when booting from Flexspi, this cause u-boot prints
out unknown device if we boot from Flexspi NOR.
Signed-off-by: Ye Li <ye.li@nxp.com>

Correct Copyright
Signed-off-by: Peng Fan <peng.fan@nxp.com>