1. 28 May, 2015 1 commit
  2. 12 May, 2015 1 commit
  3. 10 May, 2015 1 commit
    • Stefan Roese's avatar
      ppc4xx: Remove sc3 board · 27e72156
      Stefan Roese authored
      
      
      As this board seems to be unmaintained for quite some time, and its
      not moved to the generic board ingrastructure, lets remove it.
      
      This will also enable us to remove the CONFIG_AUTOBOOT_DELAY_STR2
      and CONFIG_AUTOBOOT_STOP_STR2 macros, as this sc3 board is the
      only one using one of this macros. A removal patch will follow
      soon.
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      Cc: Heiko Schocher <hs@denx.de>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Juergen Beisert <jbeisert@eurodsn.de>
      Acked-by: default avatarHeiko Schocher <hs@denx.de>
      27e72156
  4. 04 May, 2015 11 commits
  5. 23 Apr, 2015 2 commits
    • Jaiprakash Singh's avatar
      driver/ifc: Add 64KB page support · 39b0bbbb
      Jaiprakash Singh authored
      
      
      IFC has two register pages.Till IFC version 1.4 each
      register page is 4KB each.But IFC ver 2.0 register page
      size is 64KB each.IFC regiters structure is break into
      two viz FCM and RUNTIME.FCM(Flash control machine) registers
      are defined in PAGE0 and controls IFC generic functionality.
      RUNTIME registers are defined in PAGE1 and controls NAND and
      GPCM funcinality.
      
      FCM and RUNTIME structures defination is common for IFC
      version 1.4 and 2.0.
      Signed-off-by: default avatarJaiprakash Singh <b44839@freescale.com>
      Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
      39b0bbbb
    • Shaohui Xie's avatar
      net/memac_phy: reuse driver for little endian SoCs · cd348efa
      Shaohui Xie authored
      
      
      The memac for PHY management on little endian SoCs is similar on big
      endian SoCs, so we modify the driver by using I/O accessor function to
      handle the endianness, so the driver can be reused on little endian
      SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian
      SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access
      is little endian, if not, the I/O access is big endian. Move fsl_memac.h
      out of powerpc include.
      Signed-off-by: default avatarShaohui Xie <Shaohui.Xie@freescale.com>
      Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
      cd348efa
  6. 21 Apr, 2015 1 commit
    • gaurav rana's avatar
      Add bootscript support to esbc_validate. · 98cb0efd
      gaurav rana authored
      
      
      1. Default environment will be used for secure boot flow
       which can't be edited or saved.
      2. Command for secure boot is predefined in the default
       environment which will run on autoboot (and autoboot is
       the only option allowed in case of secure boot) and it
       looks like this:
       #define CONFIG_SECBOOT \
       "setenv bs_hdraddr 0xe8e00000;"                 \
       "esbc_validate $bs_hdraddr;"                    \
       "source $img_addr;"                             \
       "esbc_halt;"
       #endif
      3. Boot Script can contain esbc_validate commands and bootm command.
       Uboot source command used in default secure boot command will
       run the bootscript.
      4. Command esbc_halt added to ensure either bootm executes
       after validation of images or core should just spin.
      Signed-off-by: default avatarRuchika Gupta <ruchika.gupta@freescale.com>
      Signed-off-by: default avatarGaurav Rana <gaurav.rana@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
      98cb0efd
  7. 20 Apr, 2015 3 commits
    • Scott Wood's avatar
      powerpc/mpc85xx: Remove some dead code · d87a2ad1
      Scott Wood authored
      
      
      U-Boot does not have system calls (the services it exposes to
      standalone commands use a different mechanism), so the syscall handler
      is dead code.  It's also broken code, as it assumes it is located at
      0xc00 -- while even before the patch to stop relocating exception
      vectors to 0, U-Boot had the syscall at 0x900.
      
      The critical and machine check return paths are never called -- the
      regular exception return path is used instead, which works because
      xSRR0/1 have already been saved and can be restored via the regular
      SRR0/1 (we don't care too much in U-Boot about taking a critical/mcheck
      inside another exception prolog/epilog).
      
      Also remove a few other small unused functions.
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
      d87a2ad1
    • Scott Wood's avatar
      powerpc/mpc85xx: Don't relocate exception vectors · 96d2bb95
      Scott Wood authored
      
      
      Booke does not require exception vectors to be located at address zero.
      U-Boot was doing so anyway, simply because that's how it had been done
      on other PPC.  The downside of this is that once the OS is loaded to
      address zero, the exception vectors have been overwritten -- which
      makes it difficult to diagnose a crash that happens after that point.
      
      The IVOR setup and trap entry code is simplified somewhat as a result.
      
      Also, there is no longer a need to align individual exceptions on 0x100
      byte boundaries.
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
      96d2bb95
    • Shengzhou Liu's avatar
      powerpc/t2080: enable erratum_a007186 for t2080 rev1.1 · 9ca0d35f
      Shengzhou Liu authored
      
      
      T2080 rev1.1 also needs erratum a007186.
      Signed-off-by: default avatarShengzhou Liu <Shengzhou.Liu@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
      9ca0d35f
  8. 18 Apr, 2015 7 commits
  9. 28 Mar, 2015 1 commit
  10. 24 Mar, 2015 1 commit
    • Rob Herring's avatar
      remove unnecessary version.h includes · 7682a998
      Rob Herring authored
      
      
      Various files are needlessly rebuilt every time due to the version and
      build time changing. As version.h is not actually needed, remove the
      include.
      Signed-off-by: default avatarRob Herring <robh@kernel.org>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Minkyu Kang <mk7.kang@samsung.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Tom Warren <twarren@nvidia.com>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Macpaul Lin <macpaul@andestech.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: York Sun <yorksun@freescale.com>
      Cc: Stefan Roese <sr@denx.de>
      Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: Philippe Reynes <tremyfr@yahoo.fr>
      Cc: Eric Jarrige <eric.jarrige@armadeus.org>
      Cc: "David Müller" <d.mueller@elsoft.ch>
      Cc: Phil Edworthy <phil.edworthy@renesas.com>
      Cc: Robert Baldyga <r.baldyga@samsung.com>
      Cc: Torsten Koschorrek <koschorrek@synertronixx.de>
      Cc: Anatolij Gustschin <agust@denx.de>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Reviewed-by: default avatarŁukasz Majewski <l.majewski@samsung.com>
      7682a998
  11. 17 Mar, 2015 6 commits
  12. 05 Mar, 2015 2 commits
  13. 04 Mar, 2015 2 commits
    • Ying Zhang's avatar
      powerpc: 85xx: Modify CONFIG_USB_MAX_CONTROLLER_COUNT for P1022DS · 703f5681
      Ying Zhang authored
      
      
      Modify CONFIG_USB_MAX_CONTROLLER_COUNT value to 1 on P1022DS.
      As ETSEC2 and USB2 are muxed; thus if ETSEC2 is enabled, the
      system bus hangs on USB2 if ETSEC2 is enabled but "usb start"
      command is issued. Hence making default controller count to 1
      to avoid system hang.
      Signed-off-by: default avatarNikhil Badola <nikhil.badola@freescale.com>
      Reviewed-by: default avatarYusong Sun <yorksun@freescale.com>
      703f5681
    • Shaveta Leekha's avatar
      powerpc/mpc85xx: Add DSP side awareness for Freescale Heterogeneous SoCs · b8bf0adc
      Shaveta Leekha authored
      
      
      The code provides framework for heterogeneous multicore chips based on StarCore
      and Power Architecture which are chasis-2 compliant, like B4860 and B4420
      
      It will make u-boot recognize all non-ppc cores and peripherals like
      SC3900/DSP CPUs, MAPLE, CPRI and print their configuration in u-boot logs.
      Example boot logs of B4860QDS:
      
      U-Boot 2015.01-00232-geef6e36-dirty (Jan 19 2015 - 11:58:45)
      
      CPU0:  B4860E, Version: 2.2, (0x86880022)
      Core:  e6500, Version: 2.0, (0x80400120)
      Clock Configuration:
             CPU0:1600 MHz, CPU1:1600 MHz, CPU2:1600 MHz, CPU3:1600 MHz,
             DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200 MHz,
             DSP CPU4:1200 MHz, DSP CPU5:1200 MHz,
             CCB:666.667 MHz,
             DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:166.667 MHz
             CPRI:600  MHz
             MAPLE:600  MHz, MAPLE-ULB:800  MHz, MAPLE-eTVPE:1000 MHz
             FMAN1: 666.667 MHz
             QMAN:  333.333 MHz
      
      Top level changes include:
      (1) Top level CONFIG to identify HETEROGENUOUS clusters
      (2) CONFIGS for SC3900/DSP components
      (3) Global structures like "cpu_type" and "MPC85xx_SYS_INFO"
          updated for dsp cores and other components
      (3) APIs to get DSP num cores and their Mask like:
              cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC
      (5) Code to fetch and print SC cores and other heterogenous
          device's frequencies
      (6) README added for the same
      Signed-off-by: default avatarShaveta Leekha <shaveta@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
      b8bf0adc
  14. 17 Feb, 2015 1 commit