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Use ePAPR defined properties for x86-uart: clock-frequency and
current-speed. Assign the value of clock-frequency in device tree
to plat->clock of x86-uart instead of using hardcoded number.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

This commits cleans up the board dts files.

- Correct the serial port register size to 8
- Remove the misleading status = "disabled" statement in the
  serial.dtsi
- Move the inclusion of skeleton.dtsi from serial.dtsi to board
  dts files
- Let the board dts file define stdout-path in the chosen node
- Remove device nodes in board dts files thar are duplicated to
  skeleton.dtsi
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

The name of coreboot.dtsi is misleading, as it actually describes
the legacy serial port device node.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

This makes use of the existing device tree node to use driver model
for the serial console.
Signed-off-by: Simon Glass <sjg@chromium.org>

Add more information so that U-Boot can find the address of the serial port.
Also fix the reg-shift value.
Signed-off-by: Simon Glass <sjg@chromium.org>

This contains just the minimum information for a coreboot-based board.
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>