GitLab

Add an extra byte so that this data is not byteswapped.
Signed-off-by: Sandy Patterson <apatterson@sightlogix.com>
Acked-by: Simon Glass <sjg@chromium.org>

Add a feature which speeds up the CPU to full speed in SPL to minimise
boot time. This is only supported for certain boards (at present only
jerry).
Signed-off-by: Simon Glass <sjg@chromium.org>

There is a minor error in the SDRAM timing. It does not seem to affect
anything so far. Fix it just in case.
Signed-off-by: Simon Glass <sjg@chromium.org>

This hangs when activated (by probing the PMIC). Disable it for now until we
understand the root cause.
Signed-off-by: Simon Glass <sjg@chromium.org>

This is defined in the device tree in Linux. Copy over the settings so that
this can be used instead of hard-coding the reset line.
Signed-off-by: Simon Glass <sjg@chromium.org>

This builds and displays an SPL message, but does not function beyond that.
Signed-off-by: Simon Glass <sjg@chromium.org>