1. 21 Feb, 2015 9 commits
  2. 12 Feb, 2015 1 commit
  3. 07 Feb, 2015 2 commits
  4. 06 Feb, 2015 2 commits
  5. 30 Jan, 2015 2 commits
    • Linus Walleij's avatar
      vexpress64: support the Juno Development Platform · ffc10373
      Linus Walleij authored
      The Juno Development Platform is a physical Versatile Express
      device with some differences from the emulated semihosting
      models. The main difference is that the system is split in
      a SoC and an FPGA where the SoC hosts the serial ports at
      totally different adresses.
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
    • Linus Walleij's avatar
      vexpress64: get rid of CONFIG_SYS_EXTRA_OPTIONS · f91afc4d
      Linus Walleij authored
      The Versatile Express ARMv8 semihosted FVP platform is still
      using the legacy CONFIG_SYS_EXTRA_OPTIONS method to configure
      some compile-time flags. Get rid of this and create a Kconfig
      entry for the FVP model, and a selectable bool for the
      semihosting library.
      The FVP subboard is now modeled as a target choice so we can
      eventually choose between different ARMv8 versatile express
      boards (FVP, base model, Juno...) this way. All dependent
      symbols are updated to reflect this.
      The 64bit Versatile Express board symbols are renamed
      VEXPRESS64 so we have some chance to see what is actually
      going on. Tested on the FVP fast model.
      Acked-by: default avatarSteve Rae <srae@broadcom.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
  6. 22 Jan, 2015 2 commits
  7. 19 Jan, 2015 1 commit
    • Stefan Roese's avatar
      arm: mx6: Add Barco platinum-picon and platinum-titanium · 5d6050fd
      Stefan Roese authored
      This patch adds the new Barco platinum platform. It currently
      includes those two boards:
      This is the same board as the titanium that is already supported in
      mainline U-Boot. But its now moved to this new platform to support
      multiple "flavors" of imx6 boards in one directory. Its also moved
      to support SPL booting. And with this we use the run-time DDR
      configuration of this SPL support. The board is equipped with the
      Micron MT41J128M16JT-125 DDR chips. We now can remove the DDR
      related registers tuples from the imximage.cfg file. As all this
      is done in the SPL at run-time.
      This board is new and based on the MX6DL with 1GiB DDR using the
      Micron MT41K256M16HA DDR3 chips. Its also equipped with 2 NAND
      chips (each 512MiB).
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Pieter Ronsijn <pieter.ronsijn@barco.com>
  8. 18 Dec, 2014 1 commit
  9. 11 Dec, 2014 2 commits
  10. 09 Dec, 2014 1 commit
  11. 08 Dec, 2014 1 commit
  12. 01 Dec, 2014 1 commit
  13. 27 Nov, 2014 1 commit
  14. 24 Nov, 2014 1 commit
  15. 23 Nov, 2014 1 commit
  16. 17 Nov, 2014 4 commits
  17. 13 Nov, 2014 5 commits
  18. 05 Nov, 2014 1 commit
  19. 30 Oct, 2014 2 commits