1. 21 Dec, 2015 1 commit
    • Alexey Brodkin's avatar
      axs103: add support of generic OHCI USB 1.1 controller · d0602bd4
      Alexey Brodkin authored
      This commit adds support of USB 1.1 storage media on AXS103 board.
      For some yet unknown reason USB 2.0 doesn't work on AXS103 board issuing
      messages like this:
      AXS# usb start
      starting USB...
      USB0:   USB EHCI 1.00
      scanning bus 0 for devices... EHCI timed out on TD - token=0x80008c80
      unable to get device descriptor (error=-1)
      1 USB Device(s) found
      As a work-around we're falling back to USB 1.1.
      Indeed it is much slower but at least USB storage devices are usable on
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Simon Glass <sjg@chromium.org>
  2. 08 Dec, 2015 1 commit
  3. 22 Nov, 2015 1 commit
  4. 17 Nov, 2015 1 commit
  5. 07 Sep, 2015 1 commit
  6. 26 Jun, 2015 2 commits
  7. 01 Jun, 2015 1 commit
  8. 12 May, 2015 1 commit
  9. 18 Apr, 2015 1 commit
  10. 03 Apr, 2015 1 commit
    • Alexey Brodkin's avatar
      arc: re-generate defconfigs · 97ee47bd
      Alexey Brodkin authored
      Before that moment our defconfigs were manually modified with addition
      of new options. That means once anybody wants to add another option and
      re-genarate defconfig with "make defconfig" there will be lots of
      differences. So to make future modifications more clean we'll do bulk
      re-generation right away.
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
  11. 13 Feb, 2015 1 commit
    • Alexey Brodkin's avatar
      arc: introduce U-Boot port for ARCv2 ISA · f13606b7
      Alexey Brodkin authored
      ARC HS and ARC EM are new cores based on ARCv2 ISA which is binary
      incompatible with ISAv1 (AKA ARCompact).
      Significant difference between ISAv2 and v1 is implementation of
      interrupt vector table.
      In v1 it is implemented in the same way as on many other architectures -
      as a special location where user may put whether code executed in place
      (if machine word of space is enough) or jump to a full-scale interrupt
      In v2 interrupt table is just an array of adresses of real interrupt
      handlers. That requires a separate section for IVT that is not encoded
      as code by assembler.
      This change adds support for following cores:
       * ARC EM6 (simple 32-bit microcontroller without MMU)
       * ARC HS36 (advanced 32-bit microcontroller without MMU)
       * ARC HS38 (advanced 32-bit microcontroller with MMU)
      As a part of ARC HS38 new version of MMU (v4) was introduced.
      Also this change adds AXS131 board which is the same DW ARC SDP base board but
      with ARC HS38 CPU tile.
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>