1. 22 Jan, 2009 1 commit
    • Ira Snyder's avatar
      83xx: PCI agent mode fixes for multi-board systems · 75f35209
      Ira Snyder authored
      
      
      When running a system with 2 or more MPC8349EMDS boards in PCI agent mode,
      the boards will lock up the PCI bus by scanning against each other.
      
      The boards lock against each other by trying to access the PCI bus before
      clearing their configuration lock bit. Both boards end up in a loop,
      sending and receiving "Target Not Ready" messages forever.
      
      When running in PCI agent mode, the scanning now takes place after the
      boards have cleared their configuration lock bit.
      
      Also, add a missing declaration to the mpc83xx.h header file, fixing a
      build warning.
      Signed-off-by: default avatarIra W. Snyder <iws@ovro.caltech.edu>
      Signed-off-by: default avatarKim Phillips <kim.phillips@freescale.com>
      75f35209
  2. 20 Nov, 2008 1 commit
  3. 29 Oct, 2008 1 commit
  4. 21 Oct, 2008 1 commit
  5. 24 Sep, 2008 1 commit
  6. 25 Aug, 2008 1 commit
  7. 12 Aug, 2008 1 commit
    • Scott Wood's avatar
      NAND boot: MPC8313ERDB support · e4c09508
      Scott Wood authored
      
      
      Note that with older board revisions, NAND boot may only work after a
      power-on reset, and not after a warm reset.  I don't have a newer board
      to test on; if you have a board with a 33MHz crystal, please let me know
      if it works after a warm reset.
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      e4c09508
  8. 14 Jul, 2008 1 commit
  9. 10 Jun, 2008 3 commits
  10. 28 Mar, 2008 1 commit
  11. 26 Mar, 2008 2 commits
    • Anton Vorontsov's avatar
      mpc83xx: MPC8360E-RDK: rework ddr setup, enable ecc · d892b2db
      Anton Vorontsov authored
      
      
      Current DDR setup easily causes memory corruption, this patch fixes it.
      
      Also fix TIMING_CFG0_MRS_CYC definition.
      Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
      d892b2db
    • Michael Barkowski's avatar
      mpc8323erdb: Improve the system performance · 5bbeea86
      Michael Barkowski authored
      
      
      The following changes are based on kernel UCC ethernet performance:
      
      1.  Make the CSB bus pipeline depth as 4, and enable the repeat mode
      2.  Optimize transactions between QE and CSB.  Added CFG_SPCR_OPT
          switch to enable this setting.
      
      The following changes are based on the App Note AN3369 and
      verified to improve memory latency using LMbench:
      
      3.  CS0_CONFIG[AP_n_EN] is changed from 1 to 0
      4.  CS0_CONFIG[ODT_WR_CONFIG] set to 1.  Was a reserved setting
          previously.
      5.  TIMING_CFG_1[WRREC] is changed from 3clks to 2clks  (based on
          Twr=15ns, and this was already the setting in DDR_MODE)
      6.  TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on
          Trp=15ns)
      7.  TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on
          Tras=40ns)
      8.  TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on
          Trcd=15ns)
      9.  TIMING_CFG_1[REFREC] changed from 21 clks to 11clks.  (based on
          Trfc=75ns)
      10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks.  (based
          on Tfaw=50ns)
      11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based
          on CL=3 and WL=2).
      Signed-off-by: default avatarMichael Barkowski <michael.barkowski@freescale.com>
      Acked-by: default avatarKim Phillips <kim.phillips@freescale.com>
      5bbeea86
  12. 17 Jan, 2008 1 commit
  13. 16 Jan, 2008 1 commit
  14. 11 Jan, 2008 2 commits
  15. 08 Jan, 2008 2 commits
  16. 17 Aug, 2007 1 commit
    • Kim Phillips's avatar
      mpc83xx: implement board_add_ram_info · bbea46f7
      Kim Phillips authored
      
      
      add board_add_ram_info, to make memory diagnostic output more
      consistent. u-boot banner output now looks like:
      
      DRAM:  256 MB (DDR1, 64-bit, ECC on)
      
      and for boards with SDRAM on the local bus, a line such as this is
      added:
      
      SDRAM: 64 MB (local bus)
      
      also replaced some magic numbers with their equivalent define names.
      Signed-off-by: default avatarKim Phillips <kim.phillips@freescale.com>
      bbea46f7
  17. 10 Aug, 2007 2 commits
  18. 22 Jun, 2007 2 commits
  19. 23 Apr, 2007 2 commits
  20. 02 Mar, 2007 7 commits
  21. 04 Nov, 2006 2 commits
  22. 11 Oct, 2005 1 commit
  23. 01 Aug, 2005 1 commit
  24. 28 Jul, 2005 1 commit