1. 08 Apr, 2013 2 commits
    • Bin Liu's avatar
      musb: set MUSB speed based on CONFIG · 76b09b85
      Bin Liu authored
      Do not config MUSB to highspeed mode if CONFIG_USB_GADGET_DUALSPEED
      is not set, in which case Ether gadget only operates in fullspeed.
      Reviewed-by: default avatarTom Rini <trini@ti.com>
      Signed-off-by: default avatarBin Liu <b-liu@ti.com>
    • Bin Liu's avatar
      musb: am335x: disable bulk split-combine feature · 4de602f2
      Bin Liu authored
      On TI AM335x devices, MUSB has bulk split/combine feature enabled
      in the ConfigData register, but the current MUSB driver does not
      support it yet. Therefore, disable the feature for now, until the
      driver adds the support.
      One usecase which is broken because of this feature is that Ether
      gadget stops working in Fullspeed mode (by un-defining
      After desabled this feature, MUSB driver send packets in proper size
      (no more than 64 bytes) in Fullspeed mode.
      This has been validated with Ether gadget in Fullspeed mode on AM335x
      Signed-off-by: default avatarBin Liu <b-liu@ti.com>
  2. 05 Apr, 2013 1 commit
  3. 04 Apr, 2013 5 commits
    • Albert ARIBAUD's avatar
    • Minkyu Kang's avatar
      exynos: change indentation of defines in cpu.h · 4fdebefa
      Minkyu Kang authored
      Fix the indentation of some defines by tab.
      Signed-off-by: default avatarMinkyu Kang <mk7.kang@samsung.com>
    • Albert ARIBAUD's avatar
    • Dirk Behme's avatar
      spi: mxc_spi: Fix ECSPI reset handling · d36b39bf
      Dirk Behme authored
      Reviewing the ECSPI reset handling shows two issues:
      1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg
         (ECSPIx_CONGREG) the i.MX6 technical reference manual states:
         -- cut --
         ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block
         and resets the internal logic with the exception of the ECSPI_CONREG.
         -- cut --
         Note the exception mentioned: The CONREG itself isn't reset.
         Fix this by manually writing the reset value 0 to the whole register.
         This sets the EN bit to zero, too (i.e. includes the old
      2. We want to reset the whole SPI block here. So it makes no sense
         to first read the old value of the CONREG and write it back, later.
         This will give us the old (historic/random) value of the CONREG back.
         And doesn't reset the CONREG.
         To get a clean CONREG after the reset of the block, too, don't use
         the old (historic/random) value of the CONREG while doing the reset.
         And read the clean CONREG after the reset.
      This was found while working on a SPI boot device where the i.MX6 boot
      ROM has already initialized the SPI block. The initialization by the
      boot ROM might be different to what the U-Boot driver wants to configure.
      I.e. we need a clean reset of SPI block, including the CONREG.
      Signed-off-by: default avatarDirk Behme <dirk.behme@de.bosch.com>
      CC: Stefano Babic <sbabic@denx.de>
      CC: Fabio Estevam <fabio.estevam@freescale.com>
    • Stephen Warren's avatar
      ARM: bcm2835: fix get_timer() to return ms · 5eaa2156
      Stephen Warren authored
      Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer
      driver to conform to this.
      Have the timer implementation export a custom API get_timer_us() for use
      by the BCM2835 MMC API, which needs us resolution for a HW workaround.
      Signed-off-by: default avatarStephen Warren <swarren@wwwdotorg.org>
  4. 03 Apr, 2013 14 commits
  5. 01 Apr, 2013 11 commits
  6. 29 Mar, 2013 7 commits