1. 06 Oct, 2014 38 commits
    • Marek Vasut's avatar
      arm: socfpga: sysmgr: Add FPGA bits into system manager · 807abb18
      Marek Vasut authored
      Add missing system manager bits from Altera U-Boot to make the code
      comparable. These are the bits which depend on the FPGA manager.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      807abb18
    • Marek Vasut's avatar
      arm: socfpga: reset: Add function to reset FPGA bridges · abb25f4e
      Marek Vasut authored
      Add function to enable and disable FPGA bridges. This code is used
      by the FPGA manager to disable the bridges before programming the
      FPGA and will later be also used by the initialization code for the
      chip to put the chip into well defined state during startup.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      abb25f4e
    • Pavel Machek's avatar
      arm: socfpga: fpga: Add SoCFPGA FPGA programming interface · 230fe9b2
      Pavel Machek authored
      Add code necessary to program the FPGA part of SoCFPGA from U-Boot
      with an RBF blob. This patch also integrates the code into the
      FPGA driver framework in U-Boot so it can be used via the 'fpga'
      command.
      Signed-off-by: default avatarPavel Machek <pavel@denx.de>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      
      V2: Move the not-CPU specific stuff into drivers/fpga/ and base
          this on the cleaned up altera FPGA support.
      230fe9b2
    • Marek Vasut's avatar
      arm: socfpga: board: Align checkboard() output · 604364e4
      Marek Vasut authored
      Cosmetic change to the checkboard() function output. Align the
      output with the rest of initial output produced by U-Boot.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      604364e4
    • Pavel Machek's avatar
      arm: socfpga: board: Correctly set ATAG position · 868749a6
      Pavel Machek authored
      The bi_boot_params must point to offset 0x100 in DRAM. Make it so.
      Signed-off-by: default avatarPavel Machek <pavel@denx.de>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      868749a6
    • Pavel Machek's avatar
      arm: socfpga: misc: Align print_cpuinfo() output · d5a3d3c9
      Pavel Machek authored
      Cosmetic change to the print_cpuinfo() function output. Align the
      output with the rest of initial output produced by U-Boot.
      Signed-off-by: default avatarPavel Machek <pavel@denx.de>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      d5a3d3c9
    • Pavel Machek's avatar
      arm: socfpga: misc: Add SD controller init · 4e736869
      Pavel Machek authored
      Add CPU function to register and initialize the dw_mmc SD controller.
      This allows us to use the HPS SDMMC block.
      Signed-off-by: default avatarPavel Machek <pavel@denx.de>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      4e736869
    • Pavel Machek's avatar
      arm: socfpga: misc: Add proper ethernet initialization · 45d6e677
      Pavel Machek authored
      Add function to initialize the EMAC blocks upon board startup.
      The preprocessor guards against building on SoCFPGA-VT and against
      SPL build are not needed as those are handled implicitly via both
      SPL framework and the socfpga_cyclone5.h config file, which will
      not define CONFIG_DESIGNWARE_ETH if building for SoCFPGA-VT.
      
      We cannot handle two EMAC ethernet blocks yet, therefore the ifdefs.
      Once there is hardware using both EMAC blocks, this ifdef will have
      to go.
      Signed-off-by: default avatarPavel Machek <pavel@denx.de>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      45d6e677
    • Marek Vasut's avatar
      arm: socfpga: reset: Add EMAC reset functions · e9d6a200
      Marek Vasut authored
      Add functions to reset the EMAC ethernet blocks. We cannot handle
      two EMAC ethernet blocks yet, therefore the ifdefs. Once there is
      hardware using both EMAC blocks, this ifdef will have to go.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      e9d6a200
    • Marek Vasut's avatar
      arm: socfpga: timer: Pull the timer reload value from config file · 2110eeaf
      Marek Vasut authored
      The timer reload value is a property of the timer hardware and there
      is no reason for this to be configurable. Place this into the timer
      driver just like on the other hardware.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarDinh Nguyen <dinguyen@opensource.altera.com>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      2110eeaf
    • Pavel Machek's avatar
      arm: socfpga: mmc: Pick the clock from clock manager · 498d1a62
      Pavel Machek authored
      Make the SoCFPGA MMC stub pick clock via the clock manager
      frequency accessors instead of hard-coding the frequency.
      
      Also fix calloc() misuse.
      Signed-off-by: default avatarPavel Machek <pavel@denx.de>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarDinh Nguyen <dinguyen@opensource.altera.com>
      498d1a62
    • Marek Vasut's avatar
      arm: socfpga: clock: Sync with reference code · 036ba54f
      Marek Vasut authored
      Add the missing pieces from the reference clock code from Altera. This
      puts the code on par with the Altera U-Boot fork for all but the SDRAM
      self-refresh bits, which are not part of this patch.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      036ba54f
    • Marek Vasut's avatar
      arm: socfpga: clock: Clean up bit definitions · 44428ab6
      Marek Vasut authored
      Clean up the clock code definitions so they are aligned with mainline
      standards. There are no functional changes in this patch.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      44428ab6
    • Marek Vasut's avatar
      arm: socfpga: clock: Trim down code duplication · 5d8ad0cd
      Marek Vasut authored
      Pull out functions to read frequency of Main clock VCO and
      PLL clock VCO as the code is duplicated multiple times.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarDinh Nguyen <dinguyen@opensource.altera.com>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      5d8ad0cd
    • Pavel Machek's avatar
      arm: socfpga: clock: Add code to read clock configuration · a832ddba
      Pavel Machek authored
      Add the entire bulk of code to read out clock configuration from the SoCFPGA
      CPU registers. This is important for MMC, QSPI and UART drivers as otherwise
      they cannot determine the frequency of their upstream clock.
      Signed-off-by: default avatarPavel Machek <pavel@denx.de>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      
      V2: Fixed the L4 MP clock divider and synced the clock code with latest
          rocketboards codebase (thanks Dinh for pointing this out)
      a832ddba
    • Marek Vasut's avatar
      arm: socfpga: clock: Add missing stubs into board file · 0911af00
      Marek Vasut authored
      Add some stub defines, which are used by the clock code, but are
      missing from the auto-generated header file for the SoCFPGA family.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarDinh Nguyen <dinguyen@opensource.altera.com>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      0911af00
    • Marek Vasut's avatar
      arm: socfpga: clock: Drop nonsense inlining from clock manager code · 4425e628
      Marek Vasut authored
      The inlining is done by GCC when needed, there is no need to do it
      explicitly. Furthermore, the inline keyword does not force-inline
      the code, but is only a hint for the compiler. Scrub this hint.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarDinh Nguyen <dinguyen@opensource.altera.com>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      4425e628
    • Marek Vasut's avatar
      arm: socfpga: clock: Implant order into bit definitions · 09f7e314
      Marek Vasut authored
      The bit definitions for clock manager are complete chaos. Implement
      some basic logical order into them.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      09f7e314
    • Marek Vasut's avatar
      arm: socfpga: sysmgr: Clean up system manager · 665e4caf
      Marek Vasut authored
      Clean up the system manager register definition and add the missing
      register definitions in place.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      665e4caf
    • Pavel Machek's avatar
      arm: socfpga: Add watchdog disable for socfpga · de6da925
      Pavel Machek authored
      This adds watchdog disable. It is neccessary for running Linux kernel.
      Signed-off-by: default avatarPavel Machek <pavel@denx.de>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      
      V2: Move RSTMGR_PERMODRST_L4WD0_LSB to reset_manager.h
          Reset watchdog only if CONFIG_HW_WATCHDOG is undefined (the default)
      de6da925
    • Marek Vasut's avatar
      arm: socfpga: Clean up base address file · be324354
      Marek Vasut authored
      Sort the list of functional block addresses and fix indentation.
      No functional change.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      Acked-by: default avatarChin Liang See <clsee@altera.com>
      be324354
    • Pavel Machek's avatar
      arm: socfpga: Complete the list of base addresses · e1f006f4
      Pavel Machek authored
      Add base addresses for all subsystems as documented in the
      Cyclone V HPS documentation.
      Signed-off-by: default avatarPavel Machek <pavel@denx.de>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarChin Liang See <clsee@altera.com>
      e1f006f4
    • Marek Vasut's avatar
      Merge branches 'topic/drivers/fpga-20141006', 'topic/drivers/mmc-20141006',... · 77fa1648
      Marek Vasut authored
      Merge branches 'topic/drivers/fpga-20141006', 'topic/drivers/mmc-20141006', 'topic/drivers/net-20141006', 'topic/tools/mkimage-20141006' and 'topic/arm/cache-20141006' into HEAD
      77fa1648
    • Marek Vasut's avatar
      arm: cache: Add support for write-allocate D-Cache · ff7e9700
      Marek Vasut authored
      Add configuration for the write-allocate mode of L1 D-Cache on ARM.
      This is needed for D-Cache operation on Cortex-A9 on the SoCFPGA .
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      ff7e9700
    • Charles Manning's avatar
      tools: socfpga: Add socfpga preloader signing to mkimage · 832472a9
      Charles Manning authored
      Like many platforms, the Altera socfpga platform requires that the
      preloader be "signed" in a certain way or the built-in boot ROM will
      not boot the code.
      
      This change automatically creates an appropriately signed preloader
      from an SPL image.
      
      The signed image includes a CRC which must, of course, be generated
      with a CRC generator that the SoCFPGA boot ROM agrees with otherwise
      the boot ROM will reject the image.
      
      Unfortunately the CRC used in this boot ROM is not the same as the
      Adler CRC in lib/crc32.c. Indeed the Adler code is not technically a
      CRC but is more correctly described as a checksum.
      
      Thus, the appropriate CRC generator is added to lib/ as crc32_alt.c.
      Signed-off-by: default avatarCharles Manning <cdhmanning@gmail.com>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      
      V2: - Zap unused constant
          - Explicitly print an error message in case of error
          - Rework the hdr_checksum() function to take the *header directly
            instead of a plan buffer pointer
      832472a9
    • Marek Vasut's avatar
      net: dwc: Make the cache handling less cryptic · 96cec17d
      Marek Vasut authored
      Add a few new variables to make the cache handling less cryptic.
      Add a variable for DMA and DATA descriptor start and end, so the
      correctness of the code is easier to inspect.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Cc: Joe Hershberger <joe.hershberger@gmail.com>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      Acked-by: default avatarChin Liang See <clsee@altera.com>
      96cec17d
    • Marek Vasut's avatar
      net: dwc: Fix cache alignment issues · 4f68678b
      Marek Vasut authored
      Fix remaining cache alignment issues in the DWC Ethernet driver.
      Please note that the cache handling in the driver is making the
      code hideous and thus the next patch cleans that up. In order to
      make this change reviewable though, the cleanup is split from it.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Cc: Joe Hershberger <joe.hershberger@gmail.com>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      4f68678b
    • Pavel Machek's avatar
      net: phy: Cleanup drivers/net/phy/micrel.c · 58ec63d6
      Pavel Machek authored
      Old saying says that more than three exclamation marks in a row are
      sign of mental disease. Cleanup micrel.c.
      Signed-off-by: default avatarPavel Machek <pavel@denx.de>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Cc: Joe Hershberger <joe.hershberger@gmail.com>
      Acked-by: default avatarChin Liang See <clsee@altera.com>
      58ec63d6
    • Pavel Machek's avatar
      net: Remove unused CONFIG_DW_SEARCH_PHY from configs · 464eec6d
      Pavel Machek authored
      Remove this symbol from configs, since it's unused.
      Signed-off-by: default avatarPavel Machek <pavel@denx.de>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Cc: Joe Hershberger <joe.hershberger@gmail.com>
      Acked-by: default avatarChin Liang See <clsee@altera.com>
      464eec6d
    • Marek Vasut's avatar
      mmc: dw_mmc: Fix cache alignment issue · 1bf29b3d
      Marek Vasut authored
      The DMA descriptors used by the DW MMC block must be aligned to cacheline
      size, otherwise we are unable to properly flush/inval cache over them and
      we get data corruption.
      
      The reason I chose this approach of expanding the structure is because
      the driver allocates the descriptors in bulk. This approach does waste
      space by inserting slop inbetween the descriptors, but it makes access
      to the descriptors easy as the compiler does know the real size of the
      structure. It also makes cache operations easy, since the size of the
      structure is cache aligned and the structure start address is as well.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      1bf29b3d
    • Pavel Machek's avatar
      mmc: dw_mmc: cleanups · f33c9305
      Pavel Machek authored
      The dw_mmc driver was responding to errors with debug(). Change that
      to prinf()/puts() respectively so that any errors are immediately
      obvious. Also adjust english in comments.
      Signed-off-by: default avatarPavel Machek <pavel@denx.de>
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
      Acked-by: default avatarChin Liang See <clsee@altera.com>
      f33c9305
    • Marek Vasut's avatar
      fpga: altera: Turn the switches into table lookup · 2012f238
      Marek Vasut authored
      Add a table of FPGA family with matching functions associated with
      it and make all the code just look up the family in that table and
      call the associated function instead of the horrible switch voodoo
      which was duplicated all over the place.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      2012f238
    • Marek Vasut's avatar
      fpga: altera: Clean up enums in altera.h · d44ef7ff
      Marek Vasut authored
      Get rid of the line-over-80 problems and zap the typedef that
      went alongside those enums.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      d44ef7ff
    • Marek Vasut's avatar
      fpga: altera: Make altera_validate return normal values · fda915a4
      Marek Vasut authored
      Make the function return either 0 or -EINVAL, that is, normal
      expected error codes and success codes instead of true/false
      nonsense.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      fda915a4
    • Marek Vasut's avatar
      fpga: altera: Move altera_validate to the top · 54c96b18
      Marek Vasut authored
      Move the function to the top of the file to avoid forward declaration.
      No functional change.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      54c96b18
    • Marek Vasut's avatar
      fpga: altera: More indentation trimdown · 4a4c0a5e
      Marek Vasut authored
      Further improve the indentation in the rest of the file, where
      the indentation is initially a bit less brutal. There is no
      functional change in this patch.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      4a4c0a5e
    • Marek Vasut's avatar
      fpga: altera: Clean up altera_validate function · 5561a841
      Marek Vasut authored
      Boldly go, where no programmer has gone before and just clean up
      the indentation mayhem. No functional change.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      5561a841
    • Marek Vasut's avatar
      fpga: altera: Clean up the printing and debug · 0ae16cbb
      Marek Vasut authored
      Clean up the printf() statements and get rid of the PRINTF()
      macro by replacing it with debug_cond().
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      0ae16cbb
  2. 27 Sep, 2014 1 commit
  3. 26 Sep, 2014 1 commit