Use a default RCW of protocol 0x2A_0x98, and a PBI configure file which
uses CPC1 as 512KB SRAM, then PBL tool can be used on B4860 to build a
pbl boot image.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>

Default configuration has been changed, the most important one is DDR
ref_clock which is changed from 66.67MHz to 133.33MHz. so the ratio need to
change from 24x to 12x to keep the DDR frequency. There are also some
other optimise to align with default configuration.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>

For USB device-tree fix-up to work properly, its necessary to
mention USB1 options before that of USB2 inside default hwconfig
string
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>

Current IFC timings for NAND flash are not able to support existing
K9F1G08U0B and new K9F1G08U0D flash.

so Update the timings to support both.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

Enable TPL for p1_p2_rdb_pc nand boot.
Signed-off-by: Ying Zhang <b40530@freescale.com>

Enable p1_p2_rdb_pc to start from eSPI with SPL.
Signed-off-by: Ying Zhang <b40530@freescale.com>

Enable p1_p2_rdb_pc to start from eSDHC with SPL.
Signed-off-by: Ying Zhang <b40530@freescale.com>

Fix PHY addresses for QSGMII Riser Card working in
SGMII mode on board P3041/P5020/P4080/P5040/B4860.

QSGMII Riser Card can work in SGMII mode, but
having the different PHY addresses.
So the following steps should be done:
	1. Confirm whether QSGMII Riser Card is used.
	2. If yes, set the proper PHY address.
Generally, the function is_qsgmii_riser_card() is
for step 1, and set_sgmii_phy() for step 2.

However, there are still some special situations,
take P5040 and B4860 as examples, the PHY addresses
need to be changed when serdes protocol is changed,
so it is necessary to confirm the protocol before
setting PHY addresses.
Signed-off-by: Zhao Qiang <B45475@freescale.com>

SGMII5/6 and SGMII7/8 are not on the same slot on P5040
according to the serdes protocol.
So it is not proper to organize SGMII5/6 and SGMII7/8
on one bus and SGMII5/6 can't work.
So a new bus SUPER_HYDRA_FM3_SGMII_MDIO is added for
SGMII5/6
Signed-off-by: Zhao Qiang <B45475@freescale.com>

CHASSIS2 architecture never fix clock groups for Cluster and hardware
  accelerator like PME, FMA. These are SoC defined. SoC defines :-
    - NUM of PLLs present in the system
    - Clusters and their Clock group
    - hardware accelerator and their clock group
      if no clock group, then platform clock divider for FMAN, PME
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

T1040 SoC has
    - DDR controller ver 5.0
    - 2 PLLs
    - 8 IFC Chip select
    - FMAN Muram 192K
    - No Srio
    - Sec controller ver 5.0
    - Max CPU update for its personalities

So, update the defines accordingly.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

CHASSIS2 architecture never defines type of L2 cache present in SoC.
 it is dependent upon the core present in the SoC.
 for example,
    - e6500 core has L2 cluster (Kibo)
    - e5500 core has Backside L2 Cache
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

DDR parameters clk_adjust were changed. This can make the DDR
run more stable. The new value were gotten by the DDR testing
tool.
Signed-off-by: Po Liu <Po.Liu@freescale.com>

This patch re-config the NOR flash timing parameters which could make
the ifc timing more flexible for NOR flash.
The new parameters could fix the problem of hanging at "Flash:"
occasionally when booting the board.
Signed-off-by: Po Liu <Po.Liu@freescale.com>

This patch is for board config file not to add CONFIG_SECURE_BOOT
condition for include the asm/fsl_secure_boot.h.
Signed-off-by: Po Liu <Po.Liu@freescale.com>

Signed-off-by: Tom Rini <trini@ti.com>

The patch:
"blackfin: Move blackfin watchdog driver out of the blackfin arch folder."
(sha1: e9a389a1)
changed hw_watchdog_init() prototype which didn't match
with Microblaze one.
This patch fixes the driver and Microblaze initialization.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

This bug was introduced by:
"Add GPL-2.0+ SPDX-License-Identifier to source files"
(sha1: 1a459660)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

commit 39ac3447 ("cmd_mtdparts: use 64
bits for flash size, partition size & offset") introduced warnings
in a couple places due to printf formats or pointer casting.

This patch fixes the warnings pointed out here:
http://lists.denx.de/pipermail/u-boot/2013-October/164981.htmlSigned-off-by: Scott Wood <scottwood@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Tom Rini <trini@ti.com>

If dout buffer is not 32 bit-aligned or data to transmit is not multiple
of 32 bit the read data pointer is already incremented on single byte reads.
Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

As the spi flash transfer to multiple parts, it is forgot to add
Atmel AT25DF321 spi flash support, which broken several Atmel EK
boards which this chip. So, add it
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Added GPL-2.0+ SPDX-License-Identifier for missed spi
source files.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

Added GPL-2.0+ SPDX-License-Identifier for missed sf
source files.
Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Bo Shen <voice.shen@atmel.com>

- Add comments.
- Renamed few macros.
- Add tabs.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Bo Shen <voice.shen@atmel.com>

Unified the bank_sel calculation code for erase and
write ops.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

python used in buildman doesn't need to be placed in
/usr/bin/python, So use env to ensure that the interpreter
will pick the python from environment.

Usefull with several versions of python's installed on system.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>

Signed-off-by: Tom Rini <trini@ti.com>

Pass a valid cmdtp into do_tftpb(), do_ext2load(), and do_get_fat(), to
avoid possible crashes due to null pointer dereferencing.

Commit d7884e04 does not go far enough.
There is still at least one call chain that can result in a crash.

The do_tftpb(), do_ext2load(), and do_get_fat() functions expect a valid
cmdtp.  Passing in NULL is particularly bad in the do_tftpb() case,
because eventually boot_get_kernel() will be called with a NULL cmdtp:

do_tftpb() -> netboot_common() -> bootm_maybe_autostart() -> do_bootm()
-> do_bootm_states() -> bootm_find_os() -> boot_get_kernel()

Around line 991 in cmd_bootm.c, boot_get_kernel() will dereference the
null pointer, and the board will crash.
Signed-off-by: Steven A. Falco <stevenfalco@gmail.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Drop changes for PEP 4 following python tools]
Signed-off-by: Tom Rini <trini@ti.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Add a MAC address create based on the OMAP die ID registers.
Then poplulate the ethaddr enviroment variable so that the device
tree alias can be updated prior to boot.
Signed-off-by: Dan Murphy <dmurphy@ti.com>

0x1D is reserved. So BUCK3DVS1 is started from 0x1e.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

commit d196bd88 adds
redundand environment to mmc. The usage of malloc in
env_relocate_spec triggers cache errors on armv7.

Tested on a not mainlined i.MX53 board:

Board: TQMa53
I2C:   ready
DRAM:  512 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
ERROR: v7_dcache_inval_range - start address is not aligned - 0x8f57c2d8
ERROR: v7_dcache_inval_range - stop address is not aligned - 0x8f57e2d8
ERROR: v7_dcache_inval_range - start address is not aligned - 0x8f57e2e0
ERROR: v7_dcache_inval_range - stop address is not aligned - 0x8f5802e0
Using default environment
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>

As the SPI controller is not initialized before env_init(), it causes
reading env in dataflash failed. So, although saveenv() successfully,
it shows warning information when reboot the system as following:

  *** Warning - bad CRC, using default environment

Let the env_relocate() to check env CRC and import it.
Signed-off-by: Bo Shen <voice.shen@atmel.com>

OMAP4 panda rev A6 is a 4430 es2.3 IC with an updated memory
part.

The panda rev A6 uses Elpida 2x4Gb memory and no longer uses Micron
so the timings needs to be updated
Signed-off-by: Dan Murphy <dmurphy@ti.com>

Signed-off-by: Tom Rini <trini@ti.com>

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>