1. 07 Feb, 2014 2 commits
    • Alexey Brodkin's avatar
      net/designware - switch driver to phylib usage · 92a190aa
      Alexey Brodkin authored
      With this change driver will benefit from existing phylib and thus
      custom phy functionality implemented in the driver will go away:
       * Instantiation of the driver is now much shorter - 2 parameters
      instead of 4.
       * Simplified phy management/functoinality in driver is replaced with
      rich functionality of phylib.
       * Support of custom phy initialization is now done with existing
      Note that after this change some previously used config options
      (driver-specific PHY configuration) will be obsolete and they are simply
      substituted with similar options of phylib.
      For example:
       * CONFIG_DW_AUTONEG - no need in this one. Autonegotiation is enabled
      by default.
       * CONFIG_DW_SEARCH_PHY - if one wants to specify attached phy
      explicitly CONFIG_PHY_ADDR board config option has to be used, otherwise
      automatically the first discovered on MDIO bus phy will be used
      I believe there's no need now in "doc/README.designware_eth" because
      user only needs to instantiate the driver with "designware_initialize"
      whose prototype exists in "include/netdev.h".
      Cc: Joe Hershberger <joe.hershberger@ni.com>
      Cc: Vipin Kumar <vipin.kumar@st.com>
      Cc: Stefan Roese <sr@denx.de>
      Cc: Mischa Jonker <mjonker@synopsys.com>
      Cc: Shiraz Hashim <shiraz.hashim@st.com>
      Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
      Cc: Amit Virdi <amit.virdi@st.com>
      Cc: Sonic Zhang <sonic.zhang@analog.com>
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
    • Alexey Brodkin's avatar
      net/designware: add explicit reset of {tx|rx}_currdescnum · 74cb708d
      Alexey Brodkin authored
      Driver "init" function might be called multiple times.
      On every "init" Tx/Rx buffer descriptors are initialized: "descs_init"
      -> "{tx|rx}_descs_init".
      In its turn those init functions set MAC's "{tx|rx}desclistaddr" to
      point on the first buffer descriptor in the list.
      So CPU to start operation from the first buffer descriptor as well after
      every "init" we have to reset "{tx|rx}_currdescnum".
      Cc: Joe Hershberger <joe.hershberger@ni.com>
      Cc: Vipin Kumar <vipin.kumar@st.com>
      Cc: Stefan Roese <sr@denx.de>
      Cc: Mischa Jonker <mjonker@synopsys.com>
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
  2. 22 Nov, 2013 1 commit
  3. 24 Jul, 2013 1 commit
  4. 25 Jun, 2013 1 commit
  5. 11 Jul, 2012 1 commit
    • Dinh Nguyen's avatar
      net/designware: Consecutive writes to the same register to be avoided · 66f119e5
      Dinh Nguyen authored
      This commit is an add-on to f6c4191f. There are a few registers where
      consecutive writes to the same location should be avoided or have a delay.
      According to Synopsys, here is a list of the registers and bit(s) where
      consecutive writes should be avoided or a delay is required:
      DMA Registers:
      Register 0        Bit 7
      Register 6        All bits except for 24, 16-13, 2-1.
      GMAC Registers:
      Registers 0-3     All bits
      Registers 6-7     All bits
      Register 10       All bits
      Register 11       All bits except for 5-6.
      Registers 16-47   All bits
      Register 48       All bits except for 18-16, 14.
      Register 448      Bit 4.
      Register 459      Bits 0-3.
      Signed-off-by: default avatarDinh Nguyen <dinguyen@altera.com>
      Reviewed-by: default avatarMatthew Gerlach <mgerlach@altera.com>
      Acked-by: default avatarAmit Virdi <amit.virdi@st.com>
  6. 07 Jul, 2012 2 commits
    • Stefan Roese's avatar
      net: Multiple updates/enhancements to designware.c · ef76025a
      Stefan Roese authored
      This patch adds the following changes to designware ethernet driver
      found on the ST SPEAr SoC:
      - Don't init MAC & PHY upon startup. This causes a delay, waiting for
        the auto negotiation to complete. And we don't want this delay to
        always happen. Especially not on platforms where ethernet is not
        used at all (e.g. booting via flash).
        Instead postpone the MAC / PHY configuration to the stage, where
        ethernet is first used.
      - Add possibility for board specific PHY init code. This is needed
        for example on the X600 board, where the Vitesse PHY needs to be
        configured for GMII mode.
        This board specific PHY init is done via the function
        designware_board_phy_init(). And this driver now adds a weak default
        which can be overridden by board code.
      - Use common functions miiphy_speed() & miiphy_duplex() to read
        link status from PHY.
      - Print status and progress of auto negotiation.
      - Print link status (speed, dupex) upon first usage.
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      Cc: Amit Virdi <amit.virdi@st.com>
      Cc: Vipin Kumar <vipin.kumar@st.com>
      Cc: Joe Hershberger <joe.hershberger@gmail.com>
      Acked-by: default avatarJoe Hershberger <joe.hershberger@gmail.com>
    • Vipin Kumar's avatar
      SPEAr: Add interface information in initialization · 9afc1af0
      Vipin Kumar authored
      Few Designware peripheral registers need to be modified based on the
      ethernet interface selected by the board. This patch supports interface
      information in ethernet driver
      Signed-off-by: default avatarVipin Kumar <vipin.kumar@st.com>
      Signed-off-by: default avatarAmit Virdi <amit.virdi@st.com>
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
  7. 23 May, 2012 1 commit
  8. 04 Apr, 2012 7 commits
  9. 08 Aug, 2011 1 commit
  10. 25 Jul, 2011 2 commits
  11. 09 Jan, 2011 1 commit
  12. 09 Aug, 2010 1 commit
  13. 12 Jul, 2010 1 commit