1. 07 Feb, 2014 1 commit
    • Alexey Brodkin's avatar
      net/designware - switch driver to phylib usage · 92a190aa
      Alexey Brodkin authored
      
      
      With this change driver will benefit from existing phylib and thus
      custom phy functionality implemented in the driver will go away:
       * Instantiation of the driver is now much shorter - 2 parameters
      instead of 4.
       * Simplified phy management/functoinality in driver is replaced with
      rich functionality of phylib.
       * Support of custom phy initialization is now done with existing
      "board_phy_config".
      
      Note that after this change some previously used config options
      (driver-specific PHY configuration) will be obsolete and they are simply
      substituted with similar options of phylib.
      
      For example:
       * CONFIG_DW_AUTONEG - no need in this one. Autonegotiation is enabled
      by default.
       * CONFIG_DW_SEARCH_PHY - if one wants to specify attached phy
      explicitly CONFIG_PHY_ADDR board config option has to be used, otherwise
      automatically the first discovered on MDIO bus phy will be used
      
      I believe there's no need now in "doc/README.designware_eth" because
      user only needs to instantiate the driver with "designware_initialize"
      whose prototype exists in "include/netdev.h".
      
      Cc: Joe Hershberger <joe.hershberger@ni.com>
      Cc: Vipin Kumar <vipin.kumar@st.com>
      Cc: Stefan Roese <sr@denx.de>
      Cc: Mischa Jonker <mjonker@synopsys.com>
      Cc: Shiraz Hashim <shiraz.hashim@st.com>
      Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
      Cc: Amit Virdi <amit.virdi@st.com>
      Cc: Sonic Zhang <sonic.zhang@analog.com>
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      92a190aa
  2. 22 Nov, 2013 1 commit
    • Alexey Brodkin's avatar
      net: designware: Fix alignment of buffer descriptors · ed102be7
      Alexey Brodkin authored
      It's important that buffer descriptors are aligned in accordance to GMAC
      data bus width (32/64/128-bit). It's safe to align to 128-bit (16-bytes)
      for every bus width type.
      
      If buffer descriptor is improperly aligned GMAC discards lower bits of
      provided address and as a result reads from improper location that
      doesn't match expected fields.
      
      Commit ef76025a
      
       "net: Multiple
      updates/enhancements to designware.c" introduced another structure
      member "link_printed" right before buffer descriptors while "padding"
      member was left untouched. This together with alignment of structure
      itself to 16-byte boundary forces buffer descriptoprs always to be
      4-byte aligned that causes driver complete disfunction if GMAC bus width
      is 64 or 128-bit.
      
      Proposed change makes sure all buffer descriptors are 16-byte (128-bit)
      aligned.
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      Patch: 277902
      ed102be7
  3. 24 Jul, 2013 1 commit
  4. 07 Jul, 2012 2 commits
    • Stefan Roese's avatar
      net: Multiple updates/enhancements to designware.c · ef76025a
      Stefan Roese authored
      
      
      This patch adds the following changes to designware ethernet driver
      found on the ST SPEAr SoC:
      
      - Don't init MAC & PHY upon startup. This causes a delay, waiting for
        the auto negotiation to complete. And we don't want this delay to
        always happen. Especially not on platforms where ethernet is not
        used at all (e.g. booting via flash).
        Instead postpone the MAC / PHY configuration to the stage, where
        ethernet is first used.
      - Add possibility for board specific PHY init code. This is needed
        for example on the X600 board, where the Vitesse PHY needs to be
        configured for GMII mode.
        This board specific PHY init is done via the function
        designware_board_phy_init(). And this driver now adds a weak default
        which can be overridden by board code.
      - Use common functions miiphy_speed() & miiphy_duplex() to read
        link status from PHY.
      - Print status and progress of auto negotiation.
      - Print link status (speed, dupex) upon first usage.
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      Cc: Amit Virdi <amit.virdi@st.com>
      Cc: Vipin Kumar <vipin.kumar@st.com>
      Cc: Joe Hershberger <joe.hershberger@gmail.com>
      Acked-by: default avatarJoe Hershberger <joe.hershberger@gmail.com>
      ef76025a
    • Vipin Kumar's avatar
      SPEAr: Add interface information in initialization · 9afc1af0
      Vipin Kumar authored
      
      
      Few Designware peripheral registers need to be modified based on the
      ethernet interface selected by the board. This patch supports interface
      information in ethernet driver
      Signed-off-by: default avatarVipin Kumar <vipin.kumar@st.com>
      Signed-off-by: default avatarAmit Virdi <amit.virdi@st.com>
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      9afc1af0
  5. 04 Apr, 2012 2 commits
  6. 12 Jul, 2010 1 commit