1. 12 Jun, 2009 1 commit
    • Wolfgang Denk's avatar
      General help message cleanup · a89c33db
      Wolfgang Denk authored
      Many of the help messages were not really helpful; for example, many
      commands that take no arguments would not print a correct synopsis
      line, but "No additional help available." which is not exactly wrong,
      but not helpful either.
      Commit ``Make "usage" messages more helpful.'' changed this
      partially. But it also became clear that lots of "Usage" and "Help"
      messages (fields "usage" and "help" in struct cmd_tbl_s respective)
      were actually redundant.
      This patch cleans this up - for example:
      	=> help dtt
      	dtt - Digital Thermometer and Thermostat
      	dtt         - Read temperature from digital thermometer and thermostat.
      	=> help dtt
      	dtt - Read temperature from Digital Thermometer and Thermostat
      Signed-off-by: default avatarWolfgang Denk <wd@denx.de>
  2. 28 Jan, 2009 2 commits
  3. 21 Nov, 2008 1 commit
  4. 18 Oct, 2008 1 commit
  5. 03 Jun, 2008 1 commit
  6. 06 Dec, 2007 1 commit
    • Stefan Roese's avatar
      ppc4xx: Enable hardware-fix for PCI/DMA errata on AMCC 440SP/SPe boards · a27044b1
      Stefan Roese authored
      This patch enables the hardware-fix for the PCI/DMA errata's 19+22 by
      setting the FIXD bit in the SDR0_MFR register. Here a description of the
      Problem Description
      If a DMA is performed between memory and PCI with the DMA 1 Controller
      using prefetch, and as a result uses a special purpose buffer selected by
      the PCIXn Bridge Options 1 Register (PCIXn_BRDGOPT1[RBP7] - bits 31-29),
      the first part of the transfer sequence is performed twice. The
      PPC440SPe PCI Controller requests more data than was needed such that in
      the case of enforce memory protection, a host CPU  exception can occur.
      No data is corrupted, because data transfer is stopped in the PCI
      Controller. Prefetch enable is specified by setting DMA Configuration
      Register (I2O0_DMAx_CFG[DXEPD] - bit 31) to 0.
      Behavior that may be observed in a running system
      1. DMA performance is decreased because of the double access on the PCI bus
      2. If an illegal access to some address on the PCI bus is detected at the
      system level, a machine check or similar system error may occur.
      Workarounds Available
      1. Do not program prefetch. Note that a prefetch command cannot be programmed
      without selecting a special purpose buffer.
      2. To avoid crossing a physical boundary of the PCI slave device, add 512
      bytes of address to the PCI address range.
      This patch was originally provided by Pravin M. Bathija <pbathija@amcc.com>
      from AMCC and slighly changed.
      Signed-off-by: default avatarPravin M. Bathija <pbathija@amcc.com>
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
  7. 02 Oct, 2007 2 commits
  8. 16 Jul, 2007 1 commit
  9. 25 Jun, 2007 1 commit
  10. 08 Mar, 2007 1 commit
    • Stefan Roese's avatar
      [PATCH] Update AMCC Luan 440SP eval board support · 00cdb4ce
      Stefan Roese authored
      The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
      inititializition. This includes DDR auto calibration and support
      for different DIMM modules, instead of the fixed setup used in
      the earlier version.
      This patch also enables the cache in FLASH for the startup
      phase of U-Boot (while running from FLASH). After relocating to
      SDRAM the cache is disabled again. This will speed up the boot
      process, especially the SDRAM setup, since there are some loops
      for memory testing (auto calibration).
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
  11. 31 Mar, 2006 1 commit
  12. 29 Nov, 2005 1 commit