1. 10 Dec, 2011 2 commits
  2. 09 Dec, 2011 4 commits
    • Jason Liu's avatar
      i.mx: i.mx6q: add the initial support for i.mx6q ARM2 board · 76d7f574
      Jason Liu authored
      
      
      Add the initial support for Freescale i.MX6Q Armadillo2 board
      Support: MMC boot from slot 0/1, debug UART(UART4), usdhc.
      
      There is two MMC slots on the boards:
      mmc dev 0 -> connect USDHC3 -> the lower slot on the board,
      mmc dev 1 -> connect USDHC4 -> the upper slot on the board,
      Signed-off-by: default avatarJason Liu <jason.hui@linaro.org>
      Cc: Stefano Babic <sbabic@denx.de>
      Tested-by: default avatarDirk Behme <dirk.behme@de.bosch.com>
      76d7f574
    • Chander Kashyap's avatar
      S5PC2XX: Rename S5pc2XX to exynos · 393cb361
      Chander Kashyap authored
      
      
      As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15
      based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15
      based SoC's will be sub-classified as Exynos4 and Exynos5 respectively.
      
      In order to better adapt and reuse code across various upcoming Samsung Exynos
      based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in
      this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix
      are renamed as exynos4/EXYNOS4.
      Signed-off-by: default avatarChander Kashyap <chander.kashyap@linaro.org>
      Signed-off-by: default avatarMinkyu Kang <mk7.kang@samsung.com>
      393cb361
    • Stephen Warren's avatar
      tegra2: Add support for Ventana · d5ef19b9
      Stephen Warren authored
      
      
      Ventana is a board which is very similar to Seaboard. Support it by
      re-using board/nvidia/seaboard/seaboard.c with minor run-time conditionals.
      
      v5: Makefile: Use cmd_link_o_target, remove unused clean/distclean targets.
      v6: Make gpio_config_uart_seaboard() static.
      v7: Add MAINTAINERS entry for Ventana. Tom Warren doesn't have Ventana, so
          he asked me to add myself for this board.
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      Acked-by: default avatarSimon Glass <sjg@chromium.org>
      Signed-off-by: default avatarTom Warren <twarren@nvidia.com>
      d5ef19b9
    • Kyle Moffett's avatar
      mpc85xx: Add board support for the eXMeritus HWW-1U-1A devices · f8bbb4da
      Kyle Moffett authored
      
      
      The eXMeritus HWW-1U-1A unit is a DO-160-certified 13lb 1U chassis
      with 3 independent TEMPEST zones.  Two independent P2020 computers may
      be found inside each zone.  Complete hardware support is included.
      
      High-level hardware overview:
        * DO-160 certified for passenger aircraft (noncritical)
        * TEMPEST ceritified for RED/BLACK separation
        * 3 zones per chassis, 2 computers per zone (total of 6)
        * Dual-core 1.066GHz P2020 per computer
        * One 2GB DDR2 SO-RDIMM module per computer (upgradable to 4GB)
        * Removable 80GB or 160GB Intel X18-M SSD per computer
        * Front-accessible dual-port E1000E per computer
        * Front-accessible serial console per computer
        * Front-accessible USB port per computer
        * Internal Gigabit crossover within each TEMPEST zone
        * Internal unidirectional fiber links across TEMPEST zones
        * Battery-backed DS1339 I2C RTC on each CPU.
      
      Combined, each 13lb 1U chassis contains 12GB RAM, 12 cores @ 1.066GHz,
      12 front-accessible Gigabit Ethernet ports and 960GB of solid-state
      storage with a total power consumption of ~200W.
      
      Additional notes:
        * SPD detection is only known to work with the DO-160-certified DIMMs
      
        * CPU reset is a little quirky due to hardware misfeature.  Proper
          support for the hardware reset mechanism has been left for a later
          patch series to address.
      Signed-off-by: default avatarKyle Moffett <Kyle.D.Moffett@boeing.com>
      Cc: Andy Fleming <afleming@gmail.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      f8bbb4da
  3. 08 Dec, 2011 3 commits
  4. 06 Dec, 2011 9 commits
  5. 02 Dec, 2011 1 commit
  6. 01 Dec, 2011 1 commit
  7. 29 Nov, 2011 2 commits
    • Ira W. Snyder's avatar
      mpc85xx: support for Freescale COM Express P2020 · 9839709e
      Ira W. Snyder authored
      
      
      This adds support for the Freescale COM Express P2020 board. This board
      is similar to the P1_P2_RDB, but has some extra (as well as missing)
      peripherals.
      
      Unlike all other mpc85xx boards, it uses a watchdog timeout to reset.
      Using the HRESET_REQ register does not work.
      
      This board has no NOR flash, and can only be booted via SD or SPI. This
      procedure is documented in Freescale Document Number AN3659 "Booting
      from On-Chip ROM (eSDHC or eSPI)." Some alternative documentation is
      provided in Freescale Document Number P2020RM "P2020 QorIQ Integrated
      Processor Reference Manual" (section 4.5).
      Signed-off-by: default avatarIra W. Snyder <iws@ovro.caltech.edu>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      9839709e
    • Shengzhou Liu's avatar
      powerpc/p3060qds: Add board related support for P3060QDS platform · ae6b03fe
      Shengzhou Liu authored
      
      
      The P3060QDS is a Freescale reference board for the six-core P3060 SOC.
      
      P3060QDS Board Overview:
       Memory subsystem:
        - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
        - 128M Bytes NOR flash single-chip memory
        - 16M Bytes SPI flash
        - 8K Bytes AT24C64 I2C EEPROM for RCW
       Ethernet:
        - Eight Ethernet controllers (4x1G + 4x1G/2.5G)
        - Three VSC8641 PHYs on board (2xRGMII + 1xMII)
        - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3
       PCIe: Two PCI Express 2.0 controllers/ports
       USB:  Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board
       I2C:  Four I2C controllers
       UART: Supports two dUARTs up to 115200 bps for console
       RapidIO:  Two RapidIO, sRIO1 and sRIO2
      Signed-off-by: default avatarShengzhou Liu <Shengzhou.Liu@freescale.com>
      Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      ae6b03fe
  8. 15 Nov, 2011 2 commits
  9. 11 Nov, 2011 1 commit
  10. 10 Nov, 2011 3 commits
  11. 08 Nov, 2011 2 commits
  12. 07 Nov, 2011 1 commit
  13. 04 Nov, 2011 1 commit
  14. 03 Nov, 2011 6 commits
  15. 27 Oct, 2011 2 commits