1. 04 Sep, 2015 1 commit
    • Marek Vasut's avatar
      arm: socfpga: Do not call board_init_r() from board_init_f() · a665b051
      Marek Vasut authored
      Instead of calling board_init_r() directly from board_init_f(), just
      return from board_init_f(). This will make the code continue executing
      in crt0.S _main(), from which the board_init_r() is called. This patch
      aligns the SoCFPGA SPL with the correct SPL design as well as reduces
      the stack utilisation slightly.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      a665b051
  2. 08 Aug, 2015 12 commits
  3. 07 May, 2015 1 commit
  4. 21 Apr, 2015 7 commits
  5. 24 Mar, 2015 1 commit
    • Rob Herring's avatar
      remove unnecessary version.h includes · 7682a998
      Rob Herring authored
      Various files are needlessly rebuilt every time due to the version and
      build time changing. As version.h is not actually needed, remove the
      include.
      Signed-off-by: default avatarRob Herring <robh@kernel.org>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Minkyu Kang <mk7.kang@samsung.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Tom Warren <twarren@nvidia.com>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Macpaul Lin <macpaul@andestech.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: York Sun <yorksun@freescale.com>
      Cc: Stefan Roese <sr@denx.de>
      Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: Philippe Reynes <tremyfr@yahoo.fr>
      Cc: Eric Jarrige <eric.jarrige@armadeus.org>
      Cc: "David Müller" <d.mueller@elsoft.ch>
      Cc: Phil Edworthy <phil.edworthy@renesas.com>
      Cc: Robert Baldyga <r.baldyga@samsung.com>
      Cc: Torsten Koschorrek <koschorrek@synertronixx.de>
      Cc: Anatolij Gustschin <agust@denx.de>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Reviewed-by: default avatarŁukasz Majewski <l.majewski@samsung.com>
      7682a998
  6. 06 Oct, 2014 1 commit
    • Marek Vasut's avatar
      arm: socfpga: clock: Clean up bit definitions · 44428ab6
      Marek Vasut authored
      Clean up the clock code definitions so they are aligned with mainline
      standards. There are no functional changes in this patch.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@ti.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Pavel Machek <pavel@denx.de>
      Acked-by: default avatarPavel Machek <pavel@denx.de>
      44428ab6
  7. 29 Aug, 2014 1 commit
    • Chin Liang See's avatar
      socfpga: Fix SOCFPGA build error for Altera dev kit · 3ab019e1
      Chin Liang See authored
      To fix the build error when build for Altera dev kit, not
      virtual target. At same time, set the build for Altera dev
      kit as default instead virtual target. With that, U-Boot
      is booting well and SPL still lack of few drivers.
      Signed-off-by: default avatarChin Liang See <clsee@altera.com>
      Cc: Pavel Machek <pavel@denx.de>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Tom Rini <trini@ti.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      3ab019e1
  8. 04 Jul, 2014 1 commit
    • Chin Liang See's avatar
      socfpga: Adding Scan Manager driver · dc4d4aa1
      Chin Liang See authored
      Scan Manager driver will be called to configure the IOCSR
      scan chain. This configuration will setup the IO buffer settings
      Signed-off-by: default avatarChin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Wolfgang Denk <wd@denx.de>
      CC: Pavel Machek <pavel@denx.de>
      Cc: Tom Rini <trini@ti.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      dc4d4aa1
  9. 07 Apr, 2014 1 commit
  10. 03 Dec, 2013 1 commit
    • Chin Liang See's avatar
      socfpga: Adding Freeze Controller driver · 4c544197
      Chin Liang See authored
      Adding Freeze Controller driver. All HPS IOs need to be
      in freeze state during pin mux or IO buffer configuration.
      It is to avoid any glitch which might happen
      during the configuration from propagating to external devices.
      Signed-off-by: default avatarChin Liang See <clsee@altera.com>
      Cc: Wolfgang Denk <wd@denx.de>
      CC: Pavel Machek <pavel@denx.de>
      Cc: Dinh Nguyen <dinguyen@altera.com>
      Cc: Tom Rini <trini@ti.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      4c544197
  11. 07 Oct, 2013 1 commit
  12. 24 Jul, 2013 1 commit
  13. 04 Nov, 2012 2 commits
  14. 04 Oct, 2012 1 commit