1. 01 Sep, 2016 1 commit
  2. 30 Aug, 2016 7 commits
  3. 28 Aug, 2016 12 commits
  4. 27 Aug, 2016 2 commits
  5. 26 Aug, 2016 18 commits
    • Tom Rini's avatar
    • Tony Lindgren's avatar
      nand: Fix set_dev checks for no device · 1cfce74f
      Tony Lindgren authored
      If we do nand device 0 command in u-boot on a device that has NAND support
      enabled but no NAND chip, we can get data abort at least on omaps.
      Fix the issue by replacing the check with nand_info[dev] as
      suggested by Scott Wood. The check for name existed before because before
      the array-to-pointer conversion there was no way to directly test
      nand_info[dev] for emptiness.
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
    • Masahiro Yamada's avatar
      treewide: fix "followings" to "following" · c21fc7e2
      Masahiro Yamada authored
      Most of them are my mistakes.
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
    • Masahiro Yamada's avatar
      tools: moveconfig: add Xtensa GCC prefix to CROSS_COMPILE list · 88e1346e
      Masahiro Yamada authored
      This is needed to move CONFIG options for the recently-added
      The tarball of the pre-built toolchain can be downloaded from:
      https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.9.0/Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
    • Stefan Agner's avatar
      arm: cache: always flush cache line size for page table · 8f894a4d
      Stefan Agner authored
      The page table is maintained by the CPU, hence it is safe to always
      align cache flush to a whole cache line size. This allows to use
      mmu_page_table_flush for a single page table, e.g. when configure
      only small regions through mmu_set_region_dcache_behaviour.
      Signed-off-by: default avatarStefan Agner <stefan.agner@toradex.com>
      Tested-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
      Reviewed-by: default avatarSimon Glass <sjg@chromium.org>
      Reviewed-by: default avatarHeiko Schocher <hs@denx.de>
    • Stefan Agner's avatar
      arm: cache: add support for LPAE for region D$ behavior · c5b3cabf
      Stefan Agner authored
      Add LPAE support for mmu_set_region_dcache_behaviour. The function
      is in use in some LPAE capable board such TI DRA7xx or NXP i.MX 7.
      Signed-off-by: default avatarStefan Agner <stefan.agner@toradex.com>
    • Tom Rini's avatar
      arch/arm/Kconfig: Whitespace correction · e009bfa4
      Tom Rini authored
      Use a tab not 8 spaces.
      Signed-off-by: default avatarTom Rini <trini@konsulko.com>
    • Tom Rini's avatar
      ARM: Move SYS_CACHELINE_SIZE over to Kconfig · 067716ba
      Tom Rini authored
      This series moves the CONFIG_SYS_CACHELINE_SIZE.  First, in nearly all
      cases we are mirroring the values used by the Linux Kernel here.  Also,
      so long as (and in this case, it is true) we implement flushes in hunks
      that are no larger than the smallest implementation (and given that we
      mirror the Linux Kernel, again we are fine) it is OK to align higher.
      The biggest changes here are that we always use 64 bytes for CPU_V7 even
      if for example the underlying core is only 32 bytes (this mirrors
      Linux).  Second, we say ARM64 uses 64 bytes not 128 (as found in the
      Linux Kernel) as we do not need multi-platform support (to this degree)
      and only the Cavium ThunderX 88xx series has a use for such large
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Prafulla Wadaskar <prafulla@marvell.com>
      Cc: Luka Perkov <luka.perkov@sartura.hr>
      Cc: Stefan Roese <sr@denx.de>
      Cc: Nagendra T S <nagendra@mistralsolutions.com>
      Cc: Vaibhav Hiremath <hvaibhav@ti.com>
      Acked-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
      Cc: Steve Rae <steve.rae@raedomain.com>
      Cc: Igor Grinberg <grinberg@compulab.co.il>
      Cc: Nikita Kiryanov <nikita@compulab.co.il>
      Cc: Stefan Agner <stefan.agner@toradex.com>
      Acked-by: default avatarHeiko Schocher <hs@denx.de>
      Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
      Cc: Peter Griffin <peter.griffin@linaro.org>
      Acked-by: default avatarPaul Kocialkowski <contact@paulk.fr>
      Cc: Anatolij Gustschin <agust@denx.de>
      Acked-by: default avatar"Pali Rohár" <pali.rohar@gmail.com>
      Cc: Adam Ford <aford173@gmail.com>
      Cc: Steve Sakoman <sakoman@gmail.com>
      Cc: Grazvydas Ignotas <notasas@gmail.com>
      Cc: Nishanth Menon <nm@ti.com>
      Cc: Stephen Warren <swarren@wwwdotorg.org>
      Cc: Robert Baldyga <r.baldyga@samsung.com>
      Cc: Minkyu Kang <mk7.kang@samsung.com>
      Cc: Thomas Weber <weber@corscience.de>
      Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
      Cc: David Feng <fenghua@phytium.com.cn>
      Cc: Alison Wang <b18965@freescale.com>
      Cc: Michal Simek <michal.simek@xilinx.com>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: York Sun <york.sun@nxp.com>
      Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com>
      Cc: Mingkai Hu <mingkai.hu@nxp.com>
      Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
      Cc: Aneesh Bansal <aneesh.bansal@freescale.com>
      Cc: Saksham Jain <saksham.jain@nxp.com>
      Cc: Qianyu Gong <qianyu.gong@nxp.com>
      Cc: Wang Dongsheng <dongsheng.wang@nxp.com>
      Cc: Alex Porosanu <alexandru.porosanu@freescale.com>
      Cc: Hongbo Zhang <hongbo.zhang@nxp.com>
      Cc: tang yuantian <Yuantian.Tang@freescale.com>
      Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
      Cc: Josh Wu <josh.wu@atmel.com>
      Cc: Bo Shen <voice.shen@atmel.com>
      Cc: Viresh Kumar <viresh.kumar@linaro.org>
      Cc: Hannes Schmelzer <oe5hpm@oevsv.at>
      Cc: Thomas Chou <thomas@wytron.com.tw>
      Cc: Joe Hershberger <joe.hershberger@ni.com>
      Cc: Sam Protsenko <semen.protsenko@linaro.org>
      Cc: Bin Meng <bmeng.cn@gmail.com>
      Cc: Christophe Ricard <christophe-h.ricard@st.com>
      Cc: Anand Moon <linux.amoon@gmail.com>
      Cc: Beniamino Galvani <b.galvani@gmail.com>
      Cc: Carlo Caione <carlo@endlessm.com>
      Cc: huang lin <hl@rock-chips.com>
      Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
      Cc: Xu Ziyuan <xzy.xu@rock-chips.com>
      Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com>
      Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar>
      Cc: Kever Yang <kever.yang@rock-chips.com>
      Cc: Samuel Egli <samuel.egli@siemens.com>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Hans de Goede <hdegoede@redhat.com>
      Cc: Ian Campbell <ijc@hellion.org.uk>
      Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com>
      Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
      Cc: Andre Przywara <andre.przywara@arm.com>
      Cc: Bernhard Nortmann <bernhard.nortmann@web.de>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Ben Whitten <ben.whitten@gmail.com>
      Cc: Tom Warren <twarren@nvidia.com>
      Cc: Alexander Graf <agraf@suse.de>
      Cc: Sekhar Nori <nsekhar@ti.com>
      Cc: Vitaly Andrianov <vitalya@ti.com>
      Cc: "Andrew F. Davis" <afd@ti.com>
      Cc: Murali Karicheri <m-karicheri2@ti.com>
      Cc: Carlos Hernandez <ceh@ti.com>
      Cc: Ladislav Michl <ladis@linux-mips.org>
      Cc: Ash Charles <ashcharles@gmail.com>
      Cc: Mugunthan V N <mugunthanvnm@ti.com>
      Cc: Daniel Allred <d-allred@ti.com>
      Cc: Gong Qianyu <Qianyu.Gong@freescale.com>
      Signed-off-by: default avatarTom Rini <trini@konsulko.com>
      Acked-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      Acked-by: default avatarChin Liang See <clsee@altera.com>
      Tested-by: default avatarStephen Warren <swarren@nvidia.com>
      Acked-by: default avatarPaul Kocialkowski <contact@paulk.fr>
    • Jens Kuske's avatar
      sunxi: Tune H3 DRAM PLL to improve lock time · d5ac6eef
      Jens Kuske authored
      The H3 PLL5 used for DRAM barely manages to lock to the required
      frequency before DRAM controller starts, sometimes leading to wrong
      delay-line calibration results.
      This patch changes the PLL tuning parameters to the same values as
      boot0 used, which speeds up the locking and fixes the problem.
      Signed-off-by: default avatarJens Kuske <jenskuske@gmail.com>
      Reviewed-by: default avatarHans de Goede <hdegoede@redhat.com>
      Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
    • Hans de Goede's avatar
      sunxi: display: Use PWM to drive backlight where applicable · 421c98d7
      Hans de Goede authored
      When the backlight's pwm input is connected to a pwm output of the SoC,
      actually use pwm to drive the backlight.
      The mean reason for doing this is to fix the backlight turning off
      for aprox. 1 second while the kernel is booting. This is caused by
      the kernel actually using pwm to drive the backlight, so that it
      can dim the backlight. First the pwm driver loads and switches the
      pinmux for the pin driving the backlight's pwm input to the pwm
      controller. Then about 1s later the actual backlight driver loads
      and tells the pwm driver to actually update the pwm settings, which
      have a power-on-reset value of "off".
      An additional advantage is that this allows us to initatiate the
      backlight at 80%, which is the kernel default, avoiding a brightness
      change while the kernel loads.
      Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
      Reviewed by: Peter Korsgaard <peter@korsgaard.com>
    • Hans de Goede's avatar
      sun5i: Add defconfig and dts file for the Empire Electronix M712 tablet · 8d463c5a
      Hans de Goede authored
      Add a defconfig and dts file for the Empire Electronix M712 tablet, this
      is a 7" A13 tablet, with micro-usb (otg), headphone and micro-sd slots on
      the outside. It uses a Goodix gt811 touchscreen controller, a RTL8188CTV
      wifi chip and a DMART06 (1238a4) accelerometer.
      The dts file is identical to the one submitted to the upstream kernel.
      Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
    • Hans de Goede's avatar
      sunxi: Sync dts files with upstream kernel · 860fbdd4
      Hans de Goede authored
      Sync dts files with the current (Aug 18th 2016) state of Maxime's
      linux/sunxi/for-next repo.
      Note this commit also updates configs/MSI_Primo81_defconfig,
      adding: "# CONFIG_REQUIRE_SERIAL_CONSOLE is not set", this is necessary
      because the tablet does not have a reachable uart so the dts sync
      drops its serial0 alias.
      Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
      Acked-by: default avatarIan Campbell <ijc@hellion.org.uk>
    • Hans de Goede's avatar
      sun6i: Add defconfig and dts file for tablets using the inet-q972 PCB · a1243f78
      Hans de Goede authored
      Add a defconfig and dts file for tablets using the generic inet-q972 PCB.
      Tablets with this PCB feature a mini-hdmi output, micro-usb usb-host,
      micro-usb usb-otg, 3.5mm headphone jack, a micro sd slot,
      (mini) power-barrel and an usb wifi module.
      This has been tested on a 9.7" 1024x768 qware qw tb9718-qhd tablet.
      The dts files are identical to the ones submitted to the upstream kernel.
      Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
      Acked-by: default avatarIan Campbell <ijc@hellion.org.uk>
    • Tom Rini's avatar
    • Tom Rini's avatar
    • Simon Baatz's avatar
      tools: kwboot: patch destaddr only for SoCs with header version 1 · bdf58c73
      Simon Baatz authored
      Commit f4db6c97 ("arm: mvebu: Add runtime detection of UART (xmodem)
      boot-mode") added a change to hdr->destaddr when dynamically patching an
      image for UART boot mode.  With this change, kwboot ceases to work on
      Thus, let's change hdr->destaddr only when we are patching an image with
      header version 1 (Orion and Kirkwood use header version 0).
      Signed-off-by: default avatarSimon Baatz <gmbnomis@gmail.com>
      Fixes: f4db6c97 ("arm: mvebu: Add runtime detection of UART (xmodem) boot-mode")
      Cc: Stefan Roese <sr@denx.de>
      Cc: Luka Perkov <luka.perkov@sartura.hr>
      Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
    • Chris Packham's avatar
    • Chris Packham's avatar
      arm: mvebu: a38x: update serdes error handling · 014a357b
      Chris Packham authored
      Ensure appropriate error messages are generated. Previously all errors
      indicated that the serdes was already in use. Now appropriate error
      messages are given.
      Signed-off-by: default avatarChris Packham <judge.packham@gmail.com>
      Signed-off-by: default avatarStefan Roese <sr@denx.de>