1. 26 Jun, 2015 1 commit
    • Joe Hershberger's avatar
      Move default y configs out of arch/board Kconfig · c9bb942e
      Joe Hershberger authored
      
      
      Some archs/boards specify their own default by pre-defining the config
      which causes the Kconfig system to mix up the order of the configs in
      the defconfigs... This will cause merge pain if allowed to proliferate.
      
      Remove the configs that behave this way from the archs.
      
      A few configs still remain, but that is because they only exist as
      defaults and do not have a proper Kconfig entry. Those appear to be:
      
      SPIFLASH
      DISPLAY_BOARDINFO
      Signed-off-by: default avatarJoe Hershberger <joe.hershberger@ni.com>
      [trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates,
      drop DM_USB from MSI_Primo81 as USB_MUSB_SUNXI isn't converted yet to DM]
      Signed-off-by: default avatarTom Rini <trini@konsulko.com>
      c9bb942e
  2. 19 Jun, 2015 1 commit
    • Nishanth Menon's avatar
      ARM: DRA7: Change configuration to prevent DDR reset control from EMIF · 67055bee
      Nishanth Menon authored
      DRA7/AM57xx devices can be operated in many different configurations.
      When the SoC is supposed to support a configuration where low power mode
      state may involve the SoC completely powered off and DDR is in self
      refresh, SoC EMIF controller should not be the master of the reset
      signal and an external entity might be in control of things.
      
      The default configuration of Linux on TI evms involve not powering off
      the voltage rails (due to various reasons including reliability concerns)
      and must not allow DDR reset to be controlled by EMIF. On platforms
      where external entity might control the reset signal, this configuration
      will be a "dont care".
      
      Fixes: 536d8747
      
       ("ARM: DRA7: Update DDR IO registers")
      Tested-by: default avatarKeerthy <j-keerthy@ti.com>
      Acked-by: default avatarBrad Griffis <bgriffis@ti.com>
      Signed-off-by: default avatarNishanth Menon <nm@ti.com>
      Reviewed-by: default avatarTom Rini <trini@konsulko.com>
      67055bee
  3. 17 Jun, 2015 1 commit
  4. 15 Jun, 2015 3 commits
  5. 12 Jun, 2015 9 commits
  6. 11 Jun, 2015 2 commits
  7. 10 Jun, 2015 1 commit
  8. 08 Jun, 2015 1 commit
  9. 04 Jun, 2015 1 commit
    • Hans de Goede's avatar
      sunxi: usb_phy: Swap check for disconnect threshold · 7afebb5b
      Hans de Goede authored
      
      
      Before this commit the code for determining the disconnect threshold was
      checking for sun4i or sun6i assuming that those where the exception and
      that newer SoCs use a disconnect threshold of 2 like sun7i does.
      
      But it turns out that newer SoCs actually use a disconnect threshold of 3
      and sun5i and sun7i are the exceptions, so check for those instead.
      
      Here are the settings from the various Allwinner SDK sources:
       sun4i-a10: USBC_Phy_Write(usbc_no, 0x2a, 3, 2);
       sun5i-a13: USBC_Phy_Write(usbc_no, 0x2a, 2, 2);
       sun6i-a31: USBC_Phy_Write(usbc_no, 0x2a, 3, 2);
       sun7i-a20: USBC_Phy_Write(usbc_no, 0x2a, 2, 2);
       sun8i-a23: USBC_Phy_Write(usbc_no, 0x2a, 3, 2);
       sun8i-h3:  USBC_Phy_Write(usbc_no, 0x2a, 3, 2);
       sun9i-a80: USBC_Phy_Write(usbc_no, 0x2a, 3, 2);
      
      Note this commit makes no functional changes for sun4i - sun7i, and
      changes the disconnect threshold for sun8i to match what Allwinner uses.
      Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
      Acked-by: default avatarIan Campbell <ijc@hellion.org.uk>
      7afebb5b
  10. 31 May, 2015 4 commits
  11. 29 May, 2015 8 commits
  12. 26 May, 2015 1 commit
  13. 19 May, 2015 6 commits
    • Hans de Goede's avatar
      sunxi: Make DRAM_ODT_EN Kconfig setting a bool · 8975cdf4
      Hans de Goede authored
      
      
      Make DRAM_ODT_EN Kconfig setting a bool, add a separate DRAM_ODT_CORRECTION
      setting for A23 SoCs and use DRAM_ODT_EN Kconfig everywhere instead of
      only in dram_sun4i.c and hardcoding odt_en elsewhere.
      
      Note this commit makes no functional changes for existing boards,
      its purpose is to allow changing the odt_en value on future A33 boards.
      
      For sun4i/sun5i/sun7i boards which set DRAM_ODT_EN=y (which no defconfigs
      currently do) this patch turns on odt for both the DQ and the DQS lines,
      whereas previously it was possibly (but not desirable) to turn odt on only
      for one of them by setting the in DRAM_ODT_EN option to 1 or 2 instead of 3.
      Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
      Acked-by: default avatarSiarhei Siamashka <siarhei.siamashka@gmail.com>
      8975cdf4
    • Hans de Goede's avatar
      sunxi: Fix dram initialization not working on some a33 devices · a881db09
      Hans de Goede authored
      
      
      When porting the allwinner dram init code to u-boot we missed some code
      setting an extra bit when doing auto dram config.
      
      This commits add this bit, fixing dram init not working on the ga10h
      10" a33 tablet which I'm bringing up atm.
      Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
      Acked-by: default avatarIan Campbell <ijc@hellion.org.uk>
      a881db09
    • Laurent Itti's avatar
      sunxi: add support for UART2 on A23/A33 · 5cd83b11
      Laurent Itti authored
      
      
      Add support for UART2 (2-pin version but note that RTS/CTS pins are available
      pn that port for possible future use), can be selected in config
      by using CONFIG_CONS_INDEX=3
      Signed-off-by: default avatarLaurent Itti <laurentitti@gmail.com>
      Reviewed-by: default avatarHans de Goede <hdegoede@redhat.com>
      Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
      5cd83b11
    • Tim Harvey's avatar
      imx: mx6: add get_cpu_temp_grade to obtain cpu temperature grade from OTP · f0e8e894
      Tim Harvey authored
      
      
      The MX6 has a temperature grade defined by OCOTP_MEM0[7:6] which is at 0x480
      in the Fusemap Description Table in the reference manual. Return this value
      as well as min/max temperature based on the value.
      
      Note that the IMX6SDLRM and the IMX6SXRM do not indicate this in the
      their Fusemap Description Table however Freescale has confirmed that these
      eFUSE bits match the description within the IMX6DQRM and that they will
      be added to the next revision of the respective reference manuals.
      
      This has been tested with IMX6 Automative and Industrial parts.
      Signed-off-by: default avatarTim Harvey <tharvey@gateworks.com>
      f0e8e894
    • Tim Harvey's avatar
      imx: mx6: add get_cpu_speed_grade_hz func to return MHz speed grade from OTP · 9b9449c3
      Tim Harvey authored
      
      
      The IMX6 has four different speed grades determined by eFUSE SPEED_GRADING
      indicated by OCOTP_CFG3[17:16] which is at 0x440 in the Fusemap Description
      Table. Return this frequency so that it can be used elsewhere.
      
      Note that the IMX6SDLRM and the IMX6SXRM do not indicate this in the
      their Fusemap Description Table however Freescale has confirmed that these
      eFUSE bits match the description within the IMX6DQRM and that they will
      be added to the next revision of the respective reference manuals.
      
      These have been tested with IMX6 Quad/Solo/Dual-light 800Mhz and 1GHz grades.
      Signed-off-by: default avatarTim Harvey <tharvey@gateworks.com>
      9b9449c3
    • Tim Harvey's avatar
      arm: mx6: ddr: set fast-exit on DDR3 if pd_fast_exit specified · 3625fd64
      Tim Harvey authored
      
      
      Commit fa8b7d66f49f0c7bd41467fe78f6488d8af6976a introduced fast-exit support
      to the MMDC however enabling it on the DDR3 got missed. Make sure we enable
      it on the DDR3 as well.
      
      Gateworks uses Micron memory as well as Winbond in MX6. We have found in
      testing that we need to enable fast-exit for Winbond stability. Gateworks
      boards are currently the only boards using the MX6 SPL and enabling
      fast-exit mode.
      Signed-off-by: default avatarTim Harvey <tharvey@gateworks.com>
      3625fd64
  14. 18 May, 2015 1 commit