- 11 Mar, 2013 29 commits
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Lokesh Vutla authored
Adding CPU detection support for the DRA752 ES1.0 soc. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by:
R Sricharan <r.sricharan@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Lokesh Vutla authored
Adding the build support for dra7xx_evm. Reusing omap5_evm.h config by moving it to omap5_common.h Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by:
R Sricharan <r.sricharan@ti.com>
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Lokesh Vutla authored
Adding new board files for DRA7XX socs. The pad registers layout is changed completely from OMAP5 So introducing the new structure here and also adding the minimal data. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by:
Nishant Kamat <nskamat@ti.com> Signed-off-by:
R Sricharan <r.sricharan@ti.com> Reviewed-by:
Tom Rini <trini@ti.com> [trini: Adapt omap_mmc_init call for last 2 params] Signed-off-by:
Tom Rini <trini@ti.com>
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Lokesh Vutla authored
DRA752 uses DDR3. Populating the corresponding structures with DDR3 data. Writing into MA registers if only MA is present in that soc. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by:
R Sricharan <r.sricharan@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Lokesh Vutla authored
Control module register addresses are changed from OMAP5 to DRA7XX socs. So adding the necessary changes for the same. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by:
R Sricharan <r.sricharan@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Lokesh Vutla authored
A new DPLL DDR is added in DRA7XX socs. Now clocks to EMIF CD is from DPLL DDR. So DPLL DDR should be locked before initializing RAM. Also adding other dpll data which are different from OMAP5 ES2.0. SYS_CLK running at 20MHz is introduced in DRA7xx socs. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by:
R Sricharan <r.sricharan@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Lokesh Vutla authored
PRCM register addresses are changed from OMAP5 ES2.0 to DRA7XX. So adding the necessary register changes for DRA7XX socs. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by:
R Sricharan <r.sricharan@ti.com>
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Lokesh Vutla authored
After power-up SRCOMP cells are by-passed by default in OMAP5. Software has to enable these SRCOMP sells. For ES2: All 5 SRCOMP cells needs to be enabled. For ES1: Only 4 SRCOMP cells in core power domain are enabled. The 1 in wkup domain is not enabled because smart i/os of wkup domain work with default compensation code. Signed-off-by:
R Sricharan <r.sricharan@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by:
Tom Rini <trini@ti.com> Cc: Tom Rini <trini@ti.com>
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Lokesh Vutla authored
Add pre calculated timing settings of LPDDR2 and DDR3 memories present in OMAP5430 and OMAP5432 ES2.0 versions. Also adding the DDR pad io settings required for OMAP543X SOCs here. Signed-off-by:
R Sricharan <r.sricharan@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by:
Tom Rini <trini@ti.com> Cc: Tom Rini <trini@ti.com>
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SRICHARAN R authored
Change OPP settings as per the latest 0.5 version of addendum for OMAP5430 ES2.0. omap4/hw_data.c is touched here to add dummy dividers. While here correcting OPP_NOM mpu, core frequency for OMAP4430 ES2.x Note that OMAP5430 ES1.0 support is still kept alive and would be removed in a cleanup later. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by:
R Sricharan <r.sricharan@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Nishanth Menon <nm@ti.com>
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SRICHARAN R authored
PRCM register addresses are changed from ES1.0 to ES2.0 due to PER power domain getting moved to CORE power domain. So adding the nessecary register changes for the same. Signed-off-by:
R Sricharan <r.sricharan@ti.com> Reviewed-by:
Tom Rini <trini@ti.com> Cc: Tom Rini <trini@ti.com>
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SRICHARAN R authored
Adding the CPU detection suport for OMAP5430 and OMAP5432 ES2.0 SOCs. Signed-off-by:
R Sricharan <r.sricharan@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Nishanth Menon <nm@ti.com>
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Lokesh Vutla authored
There is some code duplication in the ddr io settings code. This is avoided by moving the data to a Soc specific place and letting the code generic. This avoids unnessecary code addition for future socs. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Lokesh Vutla authored
A seperate omap_sys_ctrl_regs structure is defined for omap4 & 5. If there is any change in control module for any of the ES versions, a new structure needs to be created. In order to remove this dependency, making the register structure generic for all the omap4+ boards. Signed-off-by:
R Sricharan <r.sricharan@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Lokesh Vutla authored
Removing the duplicated code in ddr3 initialization. Also creating structure for lpddr2 mode registers to avoid unnessecary revision checks. These change reduces code addition for future Socs. Signed-off-by:
R Sricharan <r.sricharan@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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SRICHARAN R authored
The pmic code is duplicated for OMAP 4 and 5. Instead move the data to Soc specific place and share the code. Signed-off-by:
R Sricharan <r.sricharan@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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SRICHARAN R authored
Currently there is quite a lot of code which is duplicated in the clocks code for OMAP 4 and 5 Socs. Avoiding this here by moving the clocks data to a SOC specific place and the sharing the common code. This helps in addition of a new Soc with minimal changes. Signed-off-by:
R Sricharan <r.sricharan@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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SRICHARAN R authored
The current PRCM structure prototype directly matches the hardware register layout. So there is a need to change this for every new silicon revision which has register space changes. Avoiding this by making the prototye generic and populating the register addresses seperately for all Socs. Signed-off-by:
R Sricharan <r.sricharan@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Lokesh Vutla authored
Now SDRAM initialization is done on the basis of omap revision. Instead this should be done on basis of SDRAM type read from EMIF_SDRAM_CONFIG register. This will be helpful to avoid unnessecary cpu checks for new boards Signed-off-by:
R Sricharan <r.sricharan@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Nikita Kiryanov authored
Define CONFIG_SPLASHIMAGE_GUARD to prevent splashimage from being set to a value that will cause U-Boot to hang while displaying a splash screen. Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> Acked-by:
Igor Grinberg <grinberg@compulab.co.il>
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Nikita Kiryanov authored
On some architectures certain values of splashimage will lead to a data abort exception. Document the problem, and implement a callback for splashimage to reject such values. Cc: Anatolij Gustschin <agust@denx.de> Cc: Wolfgang Denk <wd@denx.de> Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> Acked-by:
Igor Grinberg <grinberg@compulab.co.il>
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Mugunthan V N authored
Before submitting packets to cpdma, phy status is updated on every packet which leads to delay in packet send intern reduces the Ethernet performance. Checking mdio status for each packet will reduce timetaken to send a packet and there by increasing the Ethernet performance. With this the performance is increased from 208KiB/s to 375KiB/s on EVMsk Signed-off-by:
Mugunthan V N <mugunthanvnm@ti.com>
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Tom Rini authored
With v3.9 and later of the Linux Kernel defaulting to multi-platform images with omap2plus_defconfig, uImage isn't builtable anymore by default. Add CONFIG_CMD_BOOTZ so that we can still boot something the kernel spits out. Cc: Sricharan R <r.sricharan@ti.com> Signed-off-by:
Tom Rini <trini@ti.com> Reviewed-by:
R Sricharan <r.sricharan@ti.com>
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Tom Rini authored
With v3.9 and later of the Linux Kernel defaulting to multi-platform images with omap2plus_defconfig, uImage isn't builtable anymore by default. Add CONFIG_CMD_BOOTZ so that we can still boot something the kernel spits out. Signed-off-by:
Tom Rini <trini@ti.com>
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Tom Rini authored
With v3.9 and later of the Linux Kernel defaulting to multi-platform images with omap2plus_defconfig, uImage isn't builtable anymore by default. Add CONFIG_CMD_BOOTZ so that we can still boot something the kernel spits out. Cc: Sricharan R <r.sricharan@ti.com> Signed-off-by:
Tom Rini <trini@ti.com> Reviewed-by:
R Sricharan <r.sricharan@ti.com>
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Tom Rini authored
With v3.9 and later of the Linux Kernel defaulting to multi-platform images with omap2plus_defconfig, uImage isn't builtable anymore by default. Add CONFIG_CMD_BOOTZ so that we can still boot something the kernel spits out. Signed-off-by:
Tom Rini <trini@ti.com> Acked-by:
Peter Korsgaard <jacmet@sunsite.dk>
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Mark Jackson authored
Expose the enable_gpmc_cs_config() function so AM33xx based boards can register GPMC chip selects. Changes in V4: - Fix checkpatch errors (TAB -> space mangling) Changes in V3: - Fix line wrapping Changes in V2: - Indicate this is for AM33xx (not OMAP2) Signed-off-by:
Mark Jackson <mpfj@newflow.co.uk> Acked-by:
Peter Korsgaard <jacmet@sunsite.dk>
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Enric Balletbo i Serra authored
In order to use SPL boot from OneNAND we should initialize the gpmc. Signed-off-by:
Enric Balletbo i Serra <eballetbo@iseebcn.com>
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Enric Balletbo i Serra authored
This patch will allow use SPL to boot an u-boot from the OneNAND. Tested with IGEPv2 board with a OneNAND from Numonyx Signed-off-by:
Enric Balletbo i Serra <eballetbo@iseebcn.com> [trini: Add <spl.h> hunk to fix warning] Signed-off-by:
Tom Rini <trini@ti.com>
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- 08 Mar, 2013 11 commits
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Enric Balletbo i Serra authored
Tested with an IGEPv2 board seems that current onenand_spl_load_image implementation doesn't work. This patch fixes this function changing the read loop and reading the onenand blocks from page to page. Tested with various IGEP based boards with a OneNAND from Numonyx. Signed-off-by:
Enric Balletbo i Serra <eballetbo@iseebcn.com>
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Enric Balletbo i Serra authored
Some ONENAND related defines use the term ONE_NAND instead of ONENAND, as the technology name is ONENAND this patch replaces all these defines. Signed-off-by:
Enric Balletbo i Serra <eballetbo@iseebcn.com>
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Nikita Kiryanov authored
Add support for user defined lcd parameters for cm-t35 splash screen. Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by:
Igor Grinberg <grinberg@compulab.co.il>
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Nikita Kiryanov authored
Add support for dvi displays with user selectable dvi presets. Cc: Wolfgang Denk <wd@denx.de> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by:
Igor Grinberg <grinberg@compulab.co.il>
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Nikita Kiryanov authored
Currently there is no logical place to put the code that prepares the splash image data. The splash image data should be ready in memory before bmp_display() is called, and after the environment is ready (since lcd.c looks for the splash image in an address specified by the environment variable "splashimage"). Our window of opportunity in board_init_r() is therefore: between env_relocate() and bmp_display(), and from the available options only the lcd related functions in drv_lcd_init() seem appropriate for such lcd oriented code. Add the option to prepare the splash image data in lcd_logo() right before it is sent to be displayed. Cc: Anatolij Gustschin <agust@denx.de> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by:
Igor Grinberg <grinberg@compulab.co.il>
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Nikita Kiryanov authored
Currently, omap3_dss_panel_config() sets gfx_format to a value that is hardcoded in the code. This forces anyone who wants to use a different gfx_format to make adjustments after calling omap3_dss_panel_config(). This could be avoided if the value of gfx_format were parameterized as input for omap3_dss_panel_config(). Make gfx_format a field in struct panel_config, and update existing structs to set this field to the value that was originally hard coded. Cc: Wolfgang Denk <wd@denx.de> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Tom Rini <trini@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by:
Igor Grinberg <grinberg@compulab.co.il>
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Nikita Kiryanov authored
Add useful omap3 dss defines for: polarity, TFT data lines, lcd display type, gfx burst size, and gfx format Cc: Anatolij Gustschin <agust@denx.de> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by:
Igor Grinberg <grinberg@compulab.co.il>
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Nikita Kiryanov authored
Add check for write protection in omap mmc driver. Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by:
Igor Grinberg <grinberg@compulab.co.il> Reviewed-by:
Tom Rini <trini@ti.com>
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Nikita Kiryanov authored
Add generic mmc write protection functionality. Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by:
Igor Grinberg <grinberg@compulab.co.il>
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Nikita Kiryanov authored
Implement a card detection check for cm-t35. Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by:
Igor Grinberg <grinberg@compulab.co.il>
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Nikita Kiryanov authored
Implement driver check for card detection. Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by:
Igor Grinberg <grinberg@compulab.co.il>
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